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02050-DSH-002-F Datasheet(PDF) 1 Page - M/A-COM Technology Solutions, Inc. |
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02050-DSH-002-F Datasheet(HTML) 1 Page - M/A-COM Technology Solutions, Inc. |
1 / 28 page 02050-DSH-002-F Mindspeed Technologies™ August 2005 Mindspeed Proprietary and Confidential M02050-15 3.3/5V Limiting Amplifier for Applications to 2.5 Gbps Applications • 2.5 Gbps STM-16/OC-48 SDH/SONET • 1.06, 2.12 and 4.24 Gbps Fibre Channel • 1.25 Gbps Ethernet • 1.25 Gbps SDH/SONET • 2.67 Gbps SDH/SONET with FEC The M02050-15 is an integrated high-gain limiting amplifier. The M02050-15 features PECL outputs and is intended for use in applications to 2.5 Gbps. Full output swing is achieved even at minimum input sensitivity. The M02050-15 can operate with a 3.3V or 5V supply. Rate select is supported for SFP applications and/or to achieve optimum sensitivity at data rates ≤ 1.25 Gbps. When rate select is high, optimum sensitivity is achieved at 2.5 Gbps. The M02050-15 also includes two analog RSSI outputs proportional to either the average or peak to peak input sig- nal and a programmable signal-level detector allowing the user to set thresholds at which the logic outputs are enabled. Other available solutions: M02049-15 3.3/5V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs) M02040-15 3.3/5V Limiting Amplifier for Applications to 2.125 Gbps (PECL outputs) M02043-15 3.3/5V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs) 1.25 Gbps and 4.25 Gbps SFP reference designs available on Mindspeed.com Typical Applications Diagram optional Level Detect Limiting Amplifier Comparator Level Shift RSSIPP PECLN PECLP Offset cancel Threshold Setting Circuit Regulator V CC ST SET V CC3 Biasing IREF Jam LOS R ST 12.1 k Ω VTT T I A Photodiode +3.3 V DINN RxAVGIN RSSI AVG DINP AC-Coupled to TIA R EXT MON M02013 Output Buffer AC or DC Coupled (as described in Applications Information) Clock Data Recovery Unit RATE SEL RATE SELControl Features • Operates with a 3.3V or 5V supply • 3.5 mV typical input sensitivity at 2.5 Gbps • PECL outputs • Rate Selection for ≤ 1.25 Gbps operation • Average Receive power monitor output (RSSIAVG) • Peak-to-peak Receive power monitor output (RSSIPP) • On-chip DC offset cancellation circuit • Low power (< 180 mW at 3.3V) • Output Jam Function • 16 pin 3x3 QFN package |
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