NCV4299A

http://onsemi.com

2

Figure 1. Simplified Block Diagram

I

Bandgap

Reference

INH

+

-

−

+

1.36 V

SI

RADJ

+

-

+

Current Limit and

Saturation Sense

+

-

1.85 V

8 mA

RO

SO

D

GND

Q

PIN FUNCTION DESCRIPTION

Pin No.

SOIC−14

Pin No.

TSSOP−14

Symbol

Description

1

1

RADJ

Reset Adjust. Use resistor divider to Q to adjust reset threshold lower. Connect to GND if not used.

2

3

D

Reset Delay. Connect external capacitor to ground to set delay time.

3

4

GND

Ground

4

−

GND

Ground

5

−

GND

Ground

6

5

INH

Inhibit. Connect to I if not needed. A high turns the regulator on. Use a low pass filter if transients

with slew rate in excess of 10 V/ms may be present on this pin during operation. See Figure 33 for

details.

7

7

RO

Reset Output. NPN collector output with internal 20 kW pullup to Q. Notifies user of out of regulation

condition.

8

8

SO

Sense Output. NPN collector output with internal 20 kW pullup to Q. Can be used to provide early

warning of an impending reset condition.

9

11

Q

5.0 V, 3.3 V, "2%, 150 mA output. Use 22 mF, ESR t 8.0 W to ground.

10

−

GND

Ground

11

−

GND

Ground

12

−

GND

Ground

13

13

I

Input. Battery Supply Input Voltage.

14

14

SI

Sense Input. Can provide an early warning signal of an impending reset condition when used with

SO.

−

2,6,9,10,12

NC

Not Connected

−

EPAD

EPAD

Connect to Ground potential or leave unconnected.