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MA9264 Datasheet(PDF) 4 Page - Dynex Semiconductor |
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MA9264 Datasheet(HTML) 4 Page - Dynex Semiconductor |
4 / 15 page MA9264 4/15 AC CHARACTERISTICS Conditions of Test for Tables 5 and 6: 1. Input pulse = V SS to 3.0V (TTL) and VSS to 4.0V (CMOS). 2. Times measurement reference level = 1.5V. 3. Input Rise and Fall times ≤5ns. 4. Output load 1TTL gate and CL = 60pF. 5. Transition is measured at ±500mV from steady state. 6. This parameter is sampled and not 100% tested. Notes for Tables 6 and 7: Characteristics apply to pre-radiation at T A = -55°C to +125°C with VDD = 5V±10% and to post 100k Rad(Si) total dose radiation at T A = 25°C with VDD = 5V ±10%. GROUP A SUBGROUPS 9, 10, 11. MAX9264X70 MAX9264X95 Symbol Parameter Min Max Min Max Units T AVAVR Read Cycle Time 70 - 95 - ns T AVQV Address Access Time - 65 - 90 ns T EHQV Chip Select Access Time - 70 - 95 ns T SLQV Chip Enable Access Time - 70 - 95 ns T EHQX (5,6) Chip Selection to Output in Low Z 15 - 15 - ns T SLQX (5,6) Chip Enable to Output in Low Z 15 - 15 - ns T ELQZ (5,6) Chip Deselection to Output in High Z 0 20 0 20 ns T SHQZ (5,6) Chip Disable to Output in High Z 0 20 0 20 ns T AXQX Output Hold from Address Change 30 - 40 - ns T GLQV Output Enable Access Time - 25 - 30 ns T GLQX (5,6) Output Enable to Output in Low Z 15 - 15 - ns T GHQZ (5,6) Output Enable to Output in High Z 0 20 0 20 ns Figure 6: Read Cycle AC Electrical Characteristics MAX9264X70 MAX9264X95 Symbol Parameter Min Max Min Max Units T AVAVW Write Cycle Tlme 55 - 60 - ns T EHWH Chip Selection to End of Write 50 - 60 - ns T SLWH Chip Enable to End of Write 50 - 60 - ns T AVWH Address Valid to End of Write 50 - 55 - ns T AVWL Address Set Up Time 0 - 0 - ns T WLWH Write Pulse Width 40 - 45 - ns T WHAV Write Recovery Time 0 - 0 - ns T WLQZ (5,6) Wnte to Output in High Z 0 20 0 20 ns T DVWH Data to Write Time Overlap 25 - 30 - ns T WHDX Data Hold from Write 0 - 0 - ns T WHQX (5,6) Output Active from End to Write 0 20 0 20 ns Figure 7: Write Cycle AC Electrical Characteristics |
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