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ISL9220A Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL9220A Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 15 page ISL9220, ISL9220A 11 FN6936.3 February 16, 2012 STAT1 and STAT2 are configured to indicate various charging conditions as given in Table 1. A fault status is triggered under one of these conditions: 1. VBAT > VOUT_OVP threshold 2. Timeout occurs before the EOC current has been reached To exit the fault mode, the input power has to be recycled, or the EN pin is toggled to HI and back to LO. Applications Information Power-On Reset (POR) The ISL9220, ISL9220A resets itself as the input voltage rises above the POR rising threshold. The internal oscillator starts to oscillate, the internal timer is reset, and the charger begins to charge the battery. The STAT1/2 pins will indicate the operating condition according to Table 1. Trickle Charge If the battery voltage is below the trickle charge threshold, the ISL9220, ISL9220A delivers a small current to charge the battery until the battery voltage reaches the fast charge threshold value. There are two trickle charge thresholds. The first threshold, VPCHG1, is to pre-charge a deeply discharged battery or short circuit. The second threshold, VPCHG2 is for batteries discharged to a voltage range from 2.5V to 3V. When VBAT is below VPCHG1, the ISL9220, ISL9220A operates as a linear regulator, providing a 50mA constant current to output. When VBAT reaches VPCHG2, the ISL9220, ISL9220A starts to operate as a switching charger. The trickle charge current is programmable by RISET2. Charge Cycle A charge cycle consists of three charge modes: trickle mode, constant current (CC) mode, and constant voltage (CV) mode. The charge cycle always starts with the trickle mode until the battery voltage stays above VMIN (3.0V typical). If the battery voltage stays below VMIN, the charger stays in the trickle mode. The charger operates in CC mode after the battery voltage is above VMIN. As the battery-pack terminal voltage rises to the final charge voltage, the CV mode operation begins. Since the battery terminal voltage is regulated at the constant output voltage in the CV mode, the charge current begins to drop. After the charge current drops below the end-of-charge level, which is programmed by RISET2. The ISL9220, ISL9220A indicates the end-of-charge (EOC) with STAT1 and STAT2 and terminates the charge. The following events initiate a new charge cycle: •POR • A new battery being inserted (detected by RTH pin) • Recovery from an battery over-temperature fault •The EN pin is toggled from HI-to-LO Recharge After a charge cycle completes at a timeout event, charging is prohibited until the recharge condition (VBAT < VRECHG) is met, then the charging restarts with the timer reset to zero. Inductor and Output Capacitor Selection To achieve better steady state and transient response, ISL9220, ISL9220A typically uses a 10µH inductor. The peak-to-peak inductor current ripple can be expressed in Equation 9: In Equation 9, usually the typical values can be used but to have a more conservative estimation, the inductance should consider the value with worst case tolerance; and for switching frequency fS, the minimum fS from the “Electrical Specifications” table on page 3 can be used. A worst case for charge current ripple is when battery voltage is half of the input voltage. To select the inductor, its saturation current rating should be at least higher than the sum of the maximum output current and half of the delta calculated from Equation 9. Another more conservative approach is to select the inductor with the current rating higher than the peak current limit. Another consideration is the inductor DC resistance since it directly affects the efficiency of the converter. Ideally, the inductor with the lower DC resistance should be considered to achieve higher efficiency. Inductor specifications could be different from different manufacturers so please check with each manufacturer if additional information is needed. For the output capacitor, a ceramic capacitor can be used because of the low ESR values, which helps to minimize the output voltage ripple. A typical value of 10µF/10V ceramic capacitor should be enough for most of the applications and the capacitor should be X5R or X7R. Board Layout Recommendations The ISL9220, ISL9220A is a high frequency switching charger and hence the PCB layout is a very important design practice to ensure a satisfactory performance. The power loop is composed of the output inductor L, the output capacitor COUT, the SW pin and the PGND pin. It is important to make the power loop as small as possible and the connecting traces among them should be direct, short and wide; the same practice should be applied to the connection of the VIN pin, the input capacitor CIN and PGND. The switching node of the converter, the SW pin, and the traces connected to this node are very noisy, so keep the voltage feedback trace and other noise sensitive traces away from these noisy traces. The input capacitor should be placed as close as possible to the VIN pin. The ground of the input and output capacitors should be connected as close as possible as well. In addition, a solid ground plane is helpful for a good EMI performance. The ISL9220, ISL9220A employs a thermal enhanced QFN package with an exposed pad. In order to maximize the current capability, it is very important that the exposed pad under the package is properly soldered to the board and is connected to other layers through thermal vias. More thermal vias and more ΔI VBAT 1 VBAT VIN ------------- – ⎝⎠ ⎜⎟ ⎛⎞ • LfS • ----------------------------------------------- = (EQ. 9) |
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