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ISL9220IRTZ-T7A Datasheet(PDF) 2 Page - Intersil Corporation

Part # ISL9220IRTZ-T7A
Description  Switching Charger for 1-Cell and 2-Cell Li-ion Batteries
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL9220IRTZ-T7A Datasheet(HTML) 2 Page - Intersil Corporation

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ISL9220, ISL9220A
2
FN6936.3
February 16, 2012
Pin Descriptions
PIN
SYMBOL
DESCRIPTION
1
STAT2
Open-drain indication pin. In conjunction with STAT1 this pin provides a unique indication for each charging state of the
cycle. This pin is capable to sink 10mA minimum current to drive an LED.
2EN
IC enable input. Drive this pin to logic LO to enable the charger. Drive this pin to logic HI to disable the charger. Do not
leave this pin floating.
3
AGND
Analog ground.
4
ISET1
Charge current programing pin. Connect a resistor between this pin and the GND pin to set the charge current.
5
ISET2
End-of-charge current programing pin. Connect a resistor between this pin and the GND pin to set the end-of-charge
current.
6
VBAT
Battery connection pin. Connect this pin to the battery. A 10µF or larger X5R ceramic capacitor is recommended for
decoupling and stability purposes.
7
ISNS
Output current sense pin. Connect a current sense resistor from this pin to VBAT. No decoupling capacitor is needed at
this pin.
8
CISP
Input current sense positive connection pin. Connector a sense resistor from this pin the CISN.
9
CISN
Input current sense negative connection pin. Connector a sense resistor from this pin the CISP.
10, 11
VIN
Input supply voltage. Connect a 4.7µF ceramic capacitor from VIN to PGND.
12
VHI
High-side NMOS FET gate drive supply pin. Connect the anode of a Schottky diode to VBIAS pin and the cathode to VHI
pin. Connect a 0.1µF capacitor from VHI pin to SW pin. See “Typical Application Diagrams” on page 6.
13, 14
SW
Switch node and inductor connection pin.
15, 16
PGND
Power ground.
17
VBIAS
Internal 5V regulator output. Connect a 0.1µF ~ 4.7µF ceramic capacitor from this pin to AGND. A typical 1µF ceramic
capacitor is recommended.
18
RTH
Input for an external NTC thermistor for battery temperature monitoring.
19
TIME
The TIME pin sets the oscillation period by connecting a timing capacitor between this pin and GND. The oscillator also
provides a time reference for the charger. The timer function can be disabled by connecting the TIME pin to GND. If the
timer is disabled, there will be no timeout function for any operation mode including trickle charge and fast charge
modes.
20
STAT1
Open-drain indication pin. In conjunction with STAT2 this pin provides a unique indication for each charging state of the
cycle. This pin is capable to sink 10mA minimum current to drive an LED.
EPAD
Exposed pad. Connect to GND electrically. Thermally, connect as much as possible copper to this pad either on the
component layer or other layers through thermal vias to enhance the thermal performance.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART MARKING
NUMBER
OF CELLS
TEMP. RANGE
(°C)
PACKAGE
Tape & Reel
(Pb-free)
PKG.
DWG. #
ISL9220IRTZ-T
92 20IRTZ
1
-40 to +85
20 Ld 4x4 TQFN
L20.4x4E
ISL9220IRTZ-T7A
92 20IRTZ
1
-40 to +85
20 Ld 4x4 TQFN
L20.4x4E
ISL9220AIRTZ-T
922 0AIRTZ
2
-40 to +85
20 Ld 4x4 TQFN
L20.4x4E
ISL9220AIRTZ-T7A
922 0AIRTZ
2
-40 to +85
20 Ld 4x4 TQFN
L20.4x4E
ISL9220IRTZEVAL1Z
Evaluation Board
ISL9220AIRTZEVAL1Z
Evaluation Board
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9220, ISL9220A.For more information on MSL please see techbrief
TB363.


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