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FLD00050 Datasheet(PDF) 8 Page - Fairchild Semiconductor |
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FLD00050 Datasheet(HTML) 8 Page - Fairchild Semiconductor |
8 / 22 page ©2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FLD00050 Rev. 1.0.6 8 Register Bit Definitions ALS_CONTR Register (0x80) The ALS_CONTR register controls the ALS operation modes and software (SW) reset for the sensor. The ALS sensor can be set to either standby mode or active mode. At either of these modes, the I2C circuitry is always active. The default mode after power up is standby mode. During standby mode, there is no ALS measurement performed but I2C communication is allowed to enable read/write to all the registers. PS_CONTR Register (0x81) The PS_CONTR register controls the PS operation modes. The PS sensor can be set to either standby mode or active mode. At either of these modes, the I2C circuitry is always active. The default mode after power up is standby mode. During standby mode, there is no PS measurement performed but I2C communication is allowed to enable read/write to all the registers. ALS_CONTR (default = 0x00) B7 B6 B5 B4 B3 B2 B1 B0 Reserved ALS Gain SW Reset ALS Mode Field Bits Description Reserved 7:4 Must write as 0 ALS Gain 3 0: Dynamic Range 2 (2 lux to 64k lux) (default) 1: Dynamic Range 1 (0.01 lux to 320 lux) SW Reset 2 0: Software reset is NOT started (default) 1: Software reset is started, default value after reset is 0 ALS Mode 1:0 00 / 01: Standby Mode (default) 10 / 11: Active Mode PS_CONTR (default = 0x00) B7 B6 B5 B4 B3 B2 B1 B0 Reserved PS Gain PS Mode Field Bits Description Reserved 7:4 Must write as 0 PS Gain 3:2 00: x1 Gain (default) 01: x4 Gain 10: x8 Gain 11: x16 Gain PS Mode 1:0 00 / 01: Standby Mode (default) 10 / 11: Active Mode |
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