NCV4949A

http://onsemi.com

7

OPERATING DESCRIPTION

The NCV4949A is a monolithic integrated low dropout

voltage regulator. Several outstanding features and auxiliary

functions are implemented to meet the requirements of

supplying

microprocessor

systems

in

automotive

applications. It is also suitable in other applications where

the included functions are required. The modular approach

of this device allows the use of other features and functions

independently when required.

Voltage Regulator

The voltage regulator uses an isolated collector vertical

PNP transistor as a regulating element. With this structure,

very low dropout voltage at currents up to 100 mA is

obtained. The dropout operation of the standby regulator is

maintained down to 3.0 V input supply voltage. The output

voltage is regulated up to a transient input supply voltage of

35 V.

A typical curve showing the standby output voltage as a

function of the input supply voltage is shown in Figure 16.

The current consumption of the device (quiescent current)

is less than 200

mA.

To reduce the quiescent current peak in the undervoltage

region and to improve the transient response in this region,

the dropout voltage is controlled. The quiescent current as

a function of the supply input voltage is shown in Figure 17.

Short Circuit Protection:

The maximum output current is internally limited. In case

of short circuit, the output current is foldback current limited

as described in Figure 15.

0.00

1.00

2.00

3.00

4.00

5.00

6.00

0

50

100

150

200

250

300

350

5.0 V

35 V

5.0 V

2.0 V

0 V

Figure 16. Output Voltage versus Supply Voltage

Figure 17. Quiescent Current versus Supply Voltage

3.0

2.5

2.0

1.5

1.0

0

5.0

10

15

20

25

30

0.5

0

Preregulator

To improve transient immunity a preregulator stabilizes

the internal supply voltage to 6.0 V. This internal voltage is

output because the output capability is very small (

≤

100

mA).

This output may be used to improve transient behavior for

supply voltages less than 8.0 V. In this case a capacitor (100

nF − 1.0

mF) must be connected between Pin 3 and GND. If

this feature is not used Pin 3 must be left open.