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MIC4605 Datasheet(PDF) 8 Page - Micrel Semiconductor |
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MIC4605 Datasheet(HTML) 8 Page - Micrel Semiconductor |
8 / 25 page Micrel, Inc. MIC4605 November 11, 2013 8 Revision 1.0 Timing Diagrams (Continued) When LI/HI input on conditions overlap, LO/HO output states are dominated by the first output to be turned on. That is, if LI goes high (on), while HO is high, HO stays high until HI goes low at which point, after a delay of tHOOFF and when HS < 2.2V, LO goes high with a delay of tLOON. Should HS never trip the aforementioned internal comparator reference (2.2V), a falling HI edge delayed by 250ns will set “HS latch” allowing LO to go high. If HS falls very fast, LO will be held low by a 35ns delay gated by HI going low. Conversely, HI going high (on) when LO is high has no effect on outputs until LI is pulled low (off) and LO falls to < 1.9V. Delay from LI going low to LO falling is tLOOFF and delay from LO < 1.9V to HO being on is tHOON. Figure 2. Separate Overlapping LI/HI Input Mode (MIC4605-1) |
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