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SCA3000-E05-25 Datasheet(PDF) 8 Page - VTI technologies

Part # SCA3000-E05-25
Description  Product Family Specification
Download  43 Pages
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Manufacturer  VTI [VTI technologies]
Direct Link  http://www.vti.fi
Logo VTI - VTI technologies

SCA3000-E05-25 Datasheet(HTML) 8 Page - VTI technologies

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SCA3000 Series
VTI Technologies Oy
8/ 43
www.vti.fi
Doc.Nr. 8257300A.07
Rev.A.07
Table 2. Available measurement modes for SCA3000.
Available measurement
modes
SCA3000-D01
SCA3000-D02
SCA3000-E01
SCA3000-E02
SCA3000-E04
SCA3000-E05
Default after power-on
or reset
Measurement
mode
Measurement
mode
Measurement
mode
Measurement
mode
Optional measurement
mode 1
Bypass
measurement
mode
Narrow band
measurement
mode
Narrow band
measurement
mode
Narrow band
measurement
mode
Optional measurement
mode 2
Not available
Not available
Wide band
measurement
mode
Wide band
measurement
mode
2.2.1.1
Bypass measurement mode
In bypass measurement mode, the signal bandwidth of the SCA3000 is extended by bypassing the
low-pass filter in signal channel. As a result of a wider measurement bandwidth, the noise level is
higher.
2.2.1.2
Narrow band measurement mode
In narrow band measurement mode, the signal bandwidth of the SCA3000 is reduced by increasing
low-pass filtering in signal channel. In addition, the output data rate is halved due to decimation. As
a result of a narrower signal bandwidth, the noise level is lower.
2.2.1.3
Wide band measurement mode
In wide band measurement mode, the SCA3000 signal channel low-pass filtering pass band is
widened. As a result of a wider measurement bandwidth, the noise level is higher.
2.2.2
Usage
The optional measurement modes can be enabled by setting the bits called MODE_BITS in MODE
register to "010" or "001". See section 3.4 for MODE register details.
Acceleration data can be read from data output registers X_LSB, X_MSB, Y_LSB, Y_MSB, Z_LSB
and Z_MSB in all measurement modes. Each of these registers can be read one by one or using
the decrement register read, which is described in section 4.1.3.2 for SPI and 4.2.1.3 for I
2C
interface. See section 3.3 for output register details.
2.2.2.1
Overflow condition
Since acceleration data registers have no limiter, the possible overflow needs to be detected using
bits [B7, B6, B5]. If bits [B7, B6, B5] are ‘011’ or ‘100’, data overflow has occurred (see Table 3).
This applies for all acceleration output registers (X_LSB … Z_MSB and BUF_DATA).
Table 3. Overflow bit patterns in acceleration data registers (X_LSB … Z_MSB and BUF_DATA).
Byte
MSB byte
LSB byte
Bit number
Acceleration data bit
B7
Sign
B6
d11
B5
d10
B4
d9
B3
d8
B2
d7
B1
d6
B0
d5
B7
d4
B6
d3
B5
d2
B4
d1
B3
d0
B2:B0
Data overflow on
positive acceleration
0
1
1
x
x
x
x
x
x
x
x
x
x
xxx
Data overflow on
negative
acceleration
1
0
0
x
x
x
x
x
x
x
x
x
x
xxx
x = ignore
In case of overflow, the output register value must be discarded. When an overflow is detected, the
bit pattern ‘0101 1111 1111 1xxx’ is used for positive accelerations and ‘1010 0000 0000 0xxx’ for


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