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PH5551A2NA1-E4 Datasheet(PDF) 7 Page - California Eastern Labs |
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PH5551A2NA1-E4 Datasheet(HTML) 7 Page - California Eastern Labs |
7 / 11 page PH5551A2NA1-E4 Chapter Title R08DS0037EJ0100 Rev.1.00 Page 7 of 10 Aug 03, 2011 (f) Register Address: 101 0 0 0 0 0 0 0 0 Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved Reserved Reserved STOP INT_COUNT INT_AT_RT INT_EN *1 Note: *1 There are two INT_EN bits in the control register. When one bit changes, the other bit also changes at the same time. STOP : Stops lux measurement after the current ADC cycle. The lux data measured last is retained. The ADC enters standby mode.(1: Stop) INT_COUNT : How many times the upper or lower threshold value is exceeded in succession before an interrupt signal is generated. (00: Once; 01: 4 times; 10: 8 times; 11: 16 times) INT_AT_RT : Automatic restoration from interrupt enable/disable (0: Processing automatically restored; 1: Processing not automatically restored (restored after the interrupt is cancelled by the system)) INT_EN : Interrupt enable/disable (0: Disable interrupts; 1: Enable interrupts) 3. Measurement Register (a) Register Address: 000 0 0 0 0 0 0 0 0 Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Measurement of lux - lower 8 bits (read only) (b) Register Address: 001 0 0 0 0 0 0 0 0 Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Measurement of lux - higher 8 bits (read only) |
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