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ISL9112IRTNZ Datasheet(PDF) 2 Page - Intersil Corporation |
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ISL9112IRTNZ Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 20 page ISL9110, ISL9112 2 FN7649.2 July 13, 2012 Block Diagram Pin Configurations ISL9110 (12 LD TDFN) TOP VIEW ISL9112 (12 LD TDFN) TOP VIEW OSC ERROR AMP PVIN PWM CONTROL PVIN MONITOR LX1 VREF REF VOUT 5 4 2 LX2 GATE DRIVERS & ANTI- SHOOT THRU 6 VIN THERMAL SHUTDOWN I2C CURRENT DETECT 1 VOUT MONITOR 9 EN 12 FB 3 PGND 11 GND EN EN EN EN EN EN VOUT CLAMP 8 BAT 10 MODE/SYNC 7 8 SCL SDA 7 PG VOLTAGE PROG. EN SOFT DISCHARGE VOUT PVIN PGND FB GND LX1 LX2 VIN EN MODE/SYNC 1 2 3 4 5 6 7 8 9 10 11 12 PG BAT ISL9110 PAD SCL SDA ISL9112 PAD VOUT PVIN PGND FB GND LX1 LX2 VIN EN MODE/SYNC 1 2 3 4 5 6 7 8 9 10 11 12 Pin Descriptions PIN # ISL9110 ISL9112 DESCRIPTION 1 VOUT VOUT Buck/boost output. Connect a 10µF capacitor to PGND. 2 LX2 LX2 Inductor connection, output side. 3 PGND PGND Power ground for high switching current. 4 LX1 LX1 Inductor connection, input side. 5 PVIN PVIN Power input. Range: 1.8V to 5.5V. Connect a 10µF capacitor to PGND. 6 VIN VIN Supply input. Range: 1.8V to 5.5V. 7PG - Open drain output. Provides output-power-good status. -SCL Logic input, I2C clock. 8BAT -Open drain output. Provides input-power-good status. - SDA Logic I/O, open drain, I2C data. 9 EN EN Logic input, drive high to enable device. 10 MODE / SYNC MODE / SYNC Logic input, high for auto PFM mode. Low for forced PWM operation. Ext. clock sync input. Range: 2.75MHz to 3.25MHz. 11 GND GND Analog ground pin. 12 FB FB Voltage feedback pin. PAD PAD PAD Exposed pad; connect to PGND. |
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