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NUC100 Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers |
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NUC100 Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers |
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10 / 75 page  NuMicro ™ NUC130 Data Sheet Publication Release Date: Jan. 2, 2012 - 10 - Revision V3.02 • I2C – Up to two sets of I 2C device – Master/Slave mode – Bidirectional data transfer between masters and slaves – Multi-master bus (no central master) – Arbitration between simultaneously transmitting masters without corruption of serial data on the bus – Serial clock synchronization allows devices with different bit rates to communicate via one serial bus – Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer – Programmable clocks allow versatile rate control – Support multiple address recognition (four slave address with mask option) • I2S – Interface with external audio CODEC – Operate as either master or slave mode – Capable of handling 8-, 16-, 24- and 32-bit word sizes – Mono and stereo audio data supported – I 2S and MSB justified data format supported – Two 8 word FIFO data buffers are provided, one for transmit and one for receive – Generates interrupt requests when buffer levels cross a programmable boundary – Support two DMA requests, one for transmit and one for receive • PS/2 Device Controller – Host communication inhibit and request to send detection – Reception frame error detection – Programmable 1 to 16 bytes transmit buffer to reduce CPU intervention – Double buffer for data reception – S/W override bus • CAN 2.0 – Supports CAN protocol version 2.0 part A and B – Bit rates up to 1M bit/s – 32 Message Objects – Each Message Object has its won identifier mask – Programmable FIFO mode (concatenation of Message Object) – Maskable interrupt – Disabled Automatic Re-transmission mode for Time Triggered CAN applications – Support power down wake-up function • EBI (External bus interface) support (100-pin and 64-pin Package Only) – Accessible space: 64KB in 8-bit mode or 128KB in 16-bit mode – Support 8-/16-bit data width – Support byte write in 16-bit data width mode • ADC – 12-bit SAR ADC with 700K SPS – Up to 8-ch single-end input or 4-ch differential input – Single scan/single cycle scan/continuous scan – Each channel with individual result register – Scan on enabled channels – Threshold voltage detection – Conversion start by software programming or external input |
Similar Part No. - NUC100 |
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Similar Description - NUC100 |
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