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EM78P860 Datasheet(PDF) 9 Page - ELAN Microelectronics Corp |
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EM78P860 Datasheet(HTML) 9 Page - ELAN Microelectronics Corp |
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9 / 26 page  * This specification is subject to be changed without notice. 4.17.2000 EM78P860 8 -BIT MICRO-CONTROLLER 9 • Bit 6 :unused. Please set to ‘0’. • Bit 7 (INT3) external INT3 pin interrupt flag. • High to low edge trigger , Refer to the Interrupt subsection. • IOCF is the interrupt mask register. User can read and clear. 14. R10~R3F (General Purpose Register) • R10~R3F (Banks 0~3) all are general purpose registers. VII.2 Special Purpose Registers 1. A (Accumulator) • Internal data transfer, or instruction operand holding • It’s not an addressable register. 2. CONT (Control Register) 765 432 1 0 - INT TS - PAB PSR2 PSR1 PSR0 • Bit 0 (PSR0) ~ Bit 2 (PSR2) TCC/WDT prescaler bits. PSR2 PSR1 PSR0 TCC Rate WDT Rate 0 0 0 1:2 1:1 0 0 1 1:4 1:2 0 1 0 1:8 1:4 0 1 1 1:16 1:8 1 0 0 1:32 1:16 1 0 1 1:64 1:32 1 1 0 1:128 1:64 1 1 1 1:256 1:128 • Bit 3 ( PAB ) : Prescaler assignment bit 0/1: TCC/WDT • Bit 4 : unused • Bit 5 ( TS ) : TCC signal source 0 : internal instruction cycle clock 1 : 16.38KHz • Bit 6 (INT) : INT enable flag 0 : interrupt masked by DISI or hardware interrupt 1 : interrupt enabled by ENI/RETI instructions • Bit 7 : unused • CONT register is readable and writable. |
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