3

PI6CX201A

Rev. C

01/03/2012

PI6CX201A

25MHz Jitter Attenuator

Application Diagram

X1

1

VC

2

AGND

3

LF

4

5

6

7

8

S0

S1

X2

18

XGND

15

CLK _OUT1

14

AVDD

13

12

11

17

DVDD

16

LD

CLK _OUT2

DGND

25 MHz (SaRonix-eCera GC2500065 commercial temp)

C2

C1 R1

S2

FREE_RUN

9

10

20

FB_CLK

19

REF_CLK

VDD

.01µF

VDD

.01µF

.01µF

10µF

DGND

DVDD

VDD

Ferrite bead

(SaRonix-eCera GC2500099 industrial temp)

Notes:

1.Afeedbackclockisrequiredforlock.Pin15canbeconnectedtopin12asshownabove.

2.ThenetworkR1,C1:C2comprisestheexternalloopfilter.Theloopbandwidthandjitterpeakingprofilesaresetby

changingthesevalues.Pleaseconsultfactorytomeetyourrequirement.

3.ThecrystalandloopfiltercomponentsshouldbeplacedonthesamesideoftheboardastheIC.Componentsshould

beplacedascloseaspossibletoIC(within300mils).

4.Agroundringshouldenclosetheloopfilterrcomponentsalongwithpins2and4.

12-0150