ISL55110, ISL55111

2

FN6228.7

May 30, 2014

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Pin Configurations

ISL55110

(16 LD QFN)

TOP VIEW

ISL55111

(16 LD QFN)

TOP VIEW

ISL55110

(8 LD TSSOP)

TOP VIEW

ISL55111

(8 LD TSSOP)

TOP VIEW

16

15

14

13

OB

GND

VH

OA

1

2

3

4

12

11

10

9

VDD

ENABLE

PD

IN-B

5678

EP

16

15

14

13

OB

GND

VH

OA

1

2

3

4

12

11

10

9

VDD

ENABLE

PD

IN-B

5678

EP

6

7

8

5

1

2

3

4

VDD

PD

IN-B

IN-A

OB

VH

OA

GND

6

7

8

5

1

2

3

4

VDD

PD

IN-B

IN-A

OB

VH

OA

GND

Pin Descriptions

16 LD QFN

8 LD TSSOP

PIN

FUNCTION

11

VDD

Logic power.

10

6

VH

Driver high rail supply.

11

7

GND

Ground, return for both VH rail and VDD logic supply. This is also the potential of the QFN’s exposed

pad (EP).

3

2

PD

Power-down. Active logic high places part in power-down mode.

2-

ENABLE

QFN Packages Only. When the ENABLE pin is low, the device will operate normally (outputs controlled

by the inputs). When the ENABLE pin is tied high, the output will be tri-stated. In other words, it will

act as if it is open or floating regardless of what is on the IN-x pins. This provides high-speed enable

control over the driver outputs.

5

4

IN-A

Logic level input that drives OA to VH rail or ground. Not inverted.

4

3

IN-B, IN-B

Logic level input that drives OB to VH rail or ground. Not inverted on ISL55110, inverted on ISL55111.

95

OA

Driver output related to IN-A.

12

8

OB

Driver output related to IN-B.

6, 7, 8, 13, 14,

15, 16

-NC

No internal connection.

EP

-

EP

Exposed thermal pad. Connect to GND, and follow good thermal pad layout guidelines.