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ACT3780QY410-T Datasheet(PDF) 3 Page - Active-Semi, Inc |
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ACT3780QY410-T Datasheet(HTML) 3 Page - Active-Semi, Inc |
3 / 20 page ACT3780 Rev 8, 09-Jul-13 Innovative PowerTM - 3 - www.active-semi.com Copyright © 2013 Active-Semi, Inc. Active-Semi Proprietary―For Authorized Recipients and Customers ActivePath TM is a trademark of Active-Semi. PIN DESCRIPTIONS PIN NAME DESCRIPTION 1 nACOK CHG_IN Status Output. nACOK is an open-drain which sinks current whenever VCHG_IN is within it's valid operating range. 2 nBLV1 Battery Voltage level Monitor Output 1. Open-drain output that sinks current when asserted. Connect a 10k or greater pull-up resistors between nBLV1 and a suitable voltage supply. See Battery Voltage Level Indication Section for more information. 3 nBLV2 Battery Voltage level Monitor Output 2. Open-drain output that sinks current when asserted. Connect a 10k or greater pull-up resistors between nBLV2 and a suitable voltage supply. See Battery Voltage Level Indication Section for more information. 4 nSTAT3 CHG_IN OVP Status Output. Open-drain output that sinks current whenever VCHG_IN is greater than OVP threshold 6.9V (typ) while battery is present. For a logic-level charge status indicator, simply connect a 10k or greater pull-up resistor between nSTAT3 and a suitable voltage supply. 5 nSTAT1 Charge State Indicator. Open-drain output with an internal 6mA current limit, allowing this pin to directly drive an indicator LED. For a logic-level charge status indicator, simply connect a 10k or greater pull-up resistor between nSTAT1 and a suitable voltage supply. See the Charging Status Indication Section for more information. 13 G Ground. 7 CHG_IN Power Input. Bypass to G with a high quality ceramic capacitor placed as close to the IC as possible. 8, 9 BAT Battery Charger output. Connect this pin to the positive terminal of the battery. Bypass to G with a high quality ceramic capacitor placed as close to the IC as possible. 10 CHGLEV Charging State Select Input. Drive CHGLEV to VSYS or to a logic high for high-current charging mode or drive to G or a logic low for low-current charging mode. See the ACIN and CHGLEV Inputs section for more information. 11 EN EN Charger Enable Input. Drive to a logic high to enable IC, drive to a logic low to disable the device and enter suspend mode. 12 ISET Charge Current Set Input. Connect a resistor from ISET to G to set the fast-charge current. 14 ACIN AC Adaptor Detect Logic Input. Detects presence of a wall adaptor and automatically adjusts the charge current to the maximum charge current level. See the ACIN and CHGLEV Inputs section for more information. 15 TH Temperature Sensing Input. Connect to battery thermistor terminal. See the Battery Temperature Monitoring section for more information. 16 DCCC Dynamic Control of Charging Current Set Input. Connect a resistor from DCCC to G to set the DCCC voltage. See the Dynamic Charge Current Control section for more information. 17 BTR Safety Timer Programming Input. Connect a resistor from BTR to G to set the safety timers. Do not leave this pin floating. See the Charging Safety Timers Section for more information. 18, 19, 20 SYS System Power Output. Bypass to G with a high quality ceramic capacitor placed as close to the IC as possible. EP Exposed Pad. Must be soldered to ground on the PCB. 6 nSTAT2 Charge State Indicator. Open-drain output with an internal 6mA current limit, allowing this pin to directly drive an indicator LED. For a logic-level charge status indicator, simply connect a 10k or greater pull-up resistor between nSTAT2 and a suitable voltage supply. See the Charging Status Indication Section for more information. |
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