LMH6515

SNOSAX4B – AUGUST 2007 – REVISED OCTOBER 2007

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PIN DESCRIPTIONS (continued)

Pin Number

Symbol

Description

Digital Inputs

1,12,11,

GAIN_0 to

Gain setting pins. See above table for gain step sizes for each pin. These pins are 3.3V CMOS

10,9

GAIN_4

logic compatible. 5V inputs may cause damage.

2

LATCH

This pin controls the function of the gain setting pins mentioned above. With LATCH in the

logic HIGH state the gain is fixed and will not change. With the LATCH in the logic LOW state

the gain is set by the state of the gain control pins. Any changes in gain made with the LATCH

pin in the LOW state will take effect immediately. This pin is 3.3V CMOS logic compatible. 5V

inputs may cause damage.

4

NC

This pin is not connected. It can be grounded or left floating.

6

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