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KSZ8001SI Datasheet(PDF) 9 Page - Micrel Semiconductor |
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KSZ8001SI Datasheet(HTML) 9 Page - Micrel Semiconductor |
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9 / 46 page  Micrel KSZ8001 June 2009 Revision 1.04 9 Pin Number Pin Name Type (Note 1) Pin Function 31 VDDRX Pwr 1.8V analog VDD (See “Circuit Design Reference for Power Supply” section for details) 32 RX- I/O Physical receive or transmit ‘-’ differential signal 33 RX+ I/O Physical receive or transmit ‘+’ differential signal 34 FXSD/ FXEN Ipd/O Fiber Mode Enable / Signal Detect in Fiber Mode If FXEN=0, FX mode is disable. The default is “0”. (See “100BASE-FX Mode” section for details) 35 GND Gnd Ground 36 GND Gnd Ground 37 REXT I Connect a 6.65K Ω external resistor from this pin to ground 38 VDDRCV Pwr 3.3V analog VDD (See “Circuit Design Reference for Power Supply” section for details) 39 GND Gnd Ground 40 TX- I/O Physical transmit or receive ‘-’ differential signal 41 TX+ I/O Physical transmit or receive ‘+’ differential signal 42 NC No Connect 43 NC No Connect 44 GND Gnd Ground 45 XO O 46 XI I 25MHz crystal/oscillator clock connections Pins (XI, XO) connect to a crystal. If an oscillator is used, XI connects to a 3.3V tolerant oscillator and XO is a no connect. Clock is +/- 50ppm for both crystal and oscillator. 47 VDDPLL Pwr 1.8V analog PLL VDD (See “Circuit Design Reference for Power Supply” section for details) 48 RST# Ipu Chip Reset Active low, minimum of 50 us pulse is required Note 1: Pwr = power supply; Gnd = ground; I = input; O = output; I/O = bi-directional Ipu = input w/ internal pull up; Ipd = input w/ internal pull down; Ipu/O = input w/ internal pull up during reset, output pin otherwise; Ipd/O = input w/ internal pull down during reset, output pin otherwise; PD = strap pull down; PU = strap pull up; Note 2: MII Rx Mode: The RXD[3..0] bits are synchronous with RXCLK. When RXDV is asserted, RXD [3..0] presents valid data to MAC through the MII. RXD [3..0] is invalid when RXDV is de-asserted. Note 3: RMII Rx Mode: The RXD[1..0] bits are synchronous with REF_CLK. For each clock period in which CRS_DV is asserted, two bits of recovered data are sent from the PHY. Note 4: SMII Rx Mode: Receive data and control information are sent in 10 bit segments. In 100MBit mode, each segment represents a new byte of data. In 10MBit mode, each segment is repeated ten times; therefore, every ten segments represents a new byte of data. The MAC can sample any one of every 10 segments in 10MBit mode. |
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