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PE9303 Datasheet(PDF) 2 Page - Peregrine Semiconductor Corp. |
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PE9303 Datasheet(HTML) 2 Page - Peregrine Semiconductor Corp. |
2 / 9 page Product Specification PE9303 Page 2 of 9 ©2003-2012 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0052-02 │ UltraCMOS® RFIC Solutions Table 2. Pin Descriptions Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS® devices are immune to latch-up. Figure 3. Pin Configuration Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS® device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3. PE9303 1 2 3 4 8 7 6 5 IN GND DEC GND OUT VDD GND GND Pin No. Pin Name Description 1 VDD Power supply pin. Bypassing is required. 2 IN Input signal pin. Should be coupled with a capacitor (eg 15 pF). 3 DEC Power supply decoupling pin. Place capacitors as close as possible and connect directly to the ground plane (eg 10 nF & 10 pF). 4 GND Ground pin. Ground pattern on the board should be as wide as possible to reduce ground impedance. 5 GND Ground pin 6 GND Ground pin 7 OUT Divided frequency output pin. This pin should be coupled with a capacitor (eg 100 pF). 8 GND Ground Pin Table 3. Absolute Maximum Ratings Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability. Symbol Parameter/Conditions Min Max Units VDD Supply voltage 4.0 V TST Storage temperature range -65 150 °C TOP Operating temperature range -40 85 °C VESD ESD voltage (Human Body Model) 250 V PINMAX Maximum input power 10 dBm |
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