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ADC12D040 Datasheet(PDF) 11 Page - Texas Instruments

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Part # ADC12D040
Description  Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12D040 Datasheet(HTML) 11 Page - Texas Instruments

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ADC12D040
www.ti.com
SNAS171D – MAY 2004 – REVISED DECEMBER 2005
FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental
drops 3 dB below its low frequency value for a full scale input.
GAIN ERROR is the deviation from the ideal slope of the transfer function. It can be calculated as:
Gain Error = Positive Full Scale Error
− Negative Full-Scale Error
(6)
Gain Error can also be separated into Positive Gain Error and Negative Gain Error, which are.
PGE = Positive Full-Scale Error
− Offset Error
(7)
NGE = Offset Error
− Negative Full-Scale Error
(8)
GAIN ERROR MATCHING is the difference in gain errors between the two converters divided by the average
gain of the converters.
INTEGRAL NON LINEARITY (INL) is a measure of the deviation of each individual code from a line drawn from
negative full scale (½ LSB below the first code transition) through positive full scale (½ LSB above the last code
transition). The deviation of any given code from this straight line is measured from the center of that code value.
INTERMODULATION DISTORTION (IMD) is the creation of additional spectral components as a result of two
sinusoidal frequencies being applied to the ADC input at the same time. It is defined as the ratio of the power in
the intermodulation products to the total power in the original frequencies. IMD is usually expressed in dBFS.
LSB (LEAST SIGNIFICANT BIT) is the bit that has the smallest value or weight of all bits. This value is VREF /
2n, where “n” is the ADC resolution in bits, which is 12 in the case of the ADC12D040.
MISSING CODES are those output codes that will never appear at the ADC outputs. The ADC12D040 is
guaranteed not to have any missing codes.
MSB (MOST SIGNIFICANT BIT) is the bit that has the largest value or weight. Its value is one half of full scale.
NEGATIVE FULL SCALE ERROR is the difference between the actual first code transition and its ideal value of
½ LSB above negative full scale.
OFFSET ERROR is the difference between the two input voltages (VIN+ –VIN−) required to cause a transition
from code 2047 to 2048.
OUTPUT DELAY is the time delay after the rising edge of the clock before the data update is presented at the
output pins.
OVER RANGE RECOVERY TIME is the time required after VIN goes from a specified voltage out of the normal
input range to a specified voltage within the normal input range and the converter makes a conversion with its
rated accuracy.
PIPELINE DELAY (LATENCY) is the number of clock cycles between initiation of conversion and when that data
is presented to the output driver stage. Data for any given sample is available at the output pins the Pipeline
Delay plus the Output Delay after the sample is taken. New data is available at every clock cycle, but the data
lags the conversion by the pipeline delay.
POSITIVE FULL SCALE ERROR is the difference between the actual last code transition and its ideal value of
1½ LSB below positive full scale.
POWER SUPPLY REJECTION RATIO (PSRR) is a measure of how well the ADC rejects a change in the power
supply voltage. For the ADC12D040, PSRR1 is the ratio of the change in Full-Scale Error that results from a
change in the d.c. power supply voltage, expressed in dB. PSRR2 is a measure of how well an a.c. signal riding
upon the power supply is rejected at the output.
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in dB, of the rms value of the input signal to the rms
value of the sum of all other spectral components below one-half the sampling frequency, not including
harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD) Is the ratio, expressed in dB, of the rms value of the
input signal to the rms value of all of the other spectral components below half the clock frequency, including
harmonics but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR) is the difference, expressed in dB, between the rms values of the
input signal and the peak spurious signal, where a spurious signal is any signal present in the output spectrum
that is not present at the input.
Copyright © 2004–2005, Texas Instruments Incorporated
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