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AFE5851 Datasheet(PDF) 3 Page - Texas Instruments |
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AFE5851 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 41 page PINOUT 1 2 3 4 5 6 7 8 10 11 12 13 9 14 15 16 48 47 46 45 44 43 42 41 39 38 37 36 40 35 34 33 IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN10 IN11 IN12 IN13 IN9 IN14 IN15 IN16 D7P D7M D6P D6M D5P D5M FCLKP FCLKM DCLKP DCLKM D4P D4M D3P D3M D2P D2M RGCPACKAGE (64pinQFN,9x9mm ) 2 AFE5851 www.ti.com............................................................................................................................................. SLOS574A – SEPTEMBER 2008 – REVISED MARCH 2009 PIN FUNCTIONS NAME NUMBER DESCRIPTION IN1–IN16 1–16 Single-ended analog input pins for channel 1 to 16. CLKINP, CLKINM 21, 22 Differential clock input pins. Single-ended clock also supported (See Clock Inputs Section). VCM 17, 64 Common-mode output pins for possible bias of the analog input signals. VREF_IN 25 Reference input in the external reference mode. RESET 57 Hardware reset pin (active high). SCLK 56 Serial interface clock input. SDATA 55 Serial interface data input. SEN 54 Serial interface enable. SDOUT 53 Serial interface data readout. PDN 59 Global power down control input (active high). SYNC 58 TGC/VGA synchronization signal input D1P/M... D4P/M 50... 43 LVDS output for channels 1 and 2, 3 and 4, 5 and 6.... to 15 and 16. D5P/M... D8P/M 38... 31 FCLKM, FCLKP 39, 40 LVDS frame clock output. DCLKM,DCLP 41, 42 LVDS bit clock output. AVDD3 18 3.3V Analog supply voltage. AVDD18 19, 24, 62 1.8V Analog supply voltage. DVDD18 28, 30, 51 1.8V LVDS buffer supply voltage. AVSS 20, 23, 61, 63 Analog ground. DVSS 29, 52 Digital ground. NC 26, 27, 60 Do not connect. Thermal Pad Bottom of the Connect to AVSS. package Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): AFE5851 |
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