The copyright and authority for the interpretation of the products are reserved by MORNSUN

Specifications subject to change without notice.

LH40 series

2013.08.28-A/1

Page 4 of 5

TRIM APPLICATION & TRIM CALCULATION

Application circuit for TRIM

(Part in broken line is the interior of models)

0V

Trim

+Vot

0V

Trim

+Vot

Trim up

Trim down

Resistance

Formula for resistance of Trim:

up:

a=

Vr ef

Vot- Vr ef

R=

T

R -a

2

down:

a=

Vr ef

Vot-Vref

R=

T

R -a

1

Note: Value for R1, R2, R3, and Vref refer to the following table.

a: User-defined parameter, no actual meanings.

Vo(V)

Resistance

3.3

5V

9V

12V

15V

24V

R1(K

Ω)

2

3.3

4.7

3.83

4.99

8.66

R2(K

Ω)

1.2

3.3

1.8

1

1

1

R3(K

Ω)

1

1

1

1

1

1

Vref(V)

1.24

2.5

2.5

2.5

2.5

2.5

Vot(V)

Output voltage of Trim, variation

≤ ±10%

TYPICAL APPLICATIONS

AC()

L

+Vo

-Vo

AC(N)

C2

C1

RL

+

TVS1

AC(L)

AC(N)

AC/DC

MOV

NTC

FUSE

(Figure 1): LH40-10B** Typical application circuit

F U SE

+Vo

AC(L)

AC(N)

-Vo

AC(N)

COM

C4

C2

C1

C3

RL

T VS1

T VS2 RL

AC(L)

MOV

NTC

AC / DC

(Figure 2):LH40-10A** Typical application circuit

Vo1

C2

C1

+

-

Vo2

T VS 1

RL

C4

C3

TV S2

RL

AC(N)

AC ( N)

F U SE

AC(L)

AC( L)

+

-

MOV

NTC

AC/ DC

(Figure 3):LH40-10D** Typical application

circuit

Vo1

-Vo2

COM

C6

C2

C5

C1

+

-

+ Vo2

T VS1

T VS3

RL

RL

C4

C3

T VS2

RL

AC(N)

AC ( N)

F USE

AC(L)

AC(L)

MOV

N TC

AC/DC

(Figure 4):LH40-10C** Typical application

circuit

AC(L)

AC(N)

+Vo

- Vo

AC/DC

+Vo

-Vo

AC(L)

AC(N)

(Figure 5): This application is not available for

this series.

Note: If you have such application, please consult to

our FAE department

EMC RECOMMENDED CIRCUIT

AC( N)

AC( L)

LCM

M O V1

R1

CX

M O V2

M O V3

CY1

CY2

LH40-10 BXX

FUSE

NTC

AC( N)

AC( L)

+Vo

-Vo

C2

C1

RL

+

T VS1

(Figure 6):Recommended circuit for applications which require higher EMC standard (external circuit output is the sam e as figure 1)

EMC RECOMMENDED CIRCUIT PCB LAYOUT

Top layer

Bottom layer

(figure 7): EMC application circuit PCB layout

Safety and recommend wiring: line width

≥3mm, line-line distance≥6mm, line- ground distance≥6mm