DS90UR124Q, DS90UR241Q

SNLS231N – SEPTEMBER 2006 – REVISED MARCH 2013

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Serializer Switching Characteristics

Over recommended operating supply and temperature ranges unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

LVDS Low-to-High Transition Time

245

550

ps

LVDS High-to-Low Transition Time

264

550

ps

(1)

4

ns

Figure 5(2)

4

ns

10

15

ns

(3)

10

15

ns

Figure 6

75

150

ns

75

150

ns

Serializer PLL Lock Time

10

ms

Serializer Delay

RAOFF = L, TRFB = H,

3.5T+2

3.5T+10

ns

Figure 8(4)

RAOFF = L, TRFB = L,

3.5T+2

3.5T+10

ns

Figure 8(4)

TxOUT_E_O

TxOUT_Eye_Opening.

5 MHz–43 MHz,

TxOUT_E_O centered on (tBIT/)2

0.76

0.84

UI

Figure 9

(1)

Specification is guaranteed by characterization and is not tested in production.

(2)

Figure 5, Figure 15 and Figure 16 show a rising edge data strobe (TCLK IN/RCLK OUT).

(3)

When the Serializer output is at TRI-STATE the Deserializer will lose PLL lock. Resynchronization MUST occur before data transfer.

(4)

Figure 1, Figure 2, Figure 8, Figure 12 and Figure 14 show a falling edge data strobe (TCLK IN/RCLK OUT).

(5)

(6)

UI – Unit Interval, equivalent to one ideal serialized data bit width. The UI scales with frequency.

(7)

TxOUT_E_O is affected by pre-emphasis value.

6

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