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URB4803LD-15WR2 Datasheet(PDF) 8 Page - MORNSUN Science& Technology Ltd. |
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URB4803LD-15WR2 Datasheet(HTML) 8 Page - MORNSUN Science& Technology Ltd. |
8 / 9 page The copyright and authority for the interpretation of the products are reserved by MORNSUN URA_LD-15WR2 & URB_LD-15WR2 2013.11.29-A/3 Page 8of9 URA_LD-15WHR2A4S&URB_LD-15WHR2A4S DIN-RAIL MOUNTING OUTLINE DIMENSIONS DIN-rail modules are fitting to TS35 rails Footprint Details Pin 1 2 3 4 5 6 Dual Ctrl GND Vin -Vo 0V +Vo Single Ctrl GND Vin 0V Trim +Vo PACKAGE DIAGRAM Special Package Series(A2S/A4S) TEST CONFIGURATIONS Input Reflected-Ripple Current Test Setup Input reflected-ripple current is measured with an inductor Lin and Capacitor Cin to simulate source impedance. DC Cin Lin DC Load Oscilloscope Current Probe Lin(4.7 µH) Cin(220 µF, ESR < 1.0Ω at 100 KHz) TRIM APPLICATION & TRIM RESISTANCE Application circuit for TRIM (Part in broken line is the interior of models) 0V R2 R1 R3 Vref RT Trim +Vo 0V R2 R1 R3 Vref RT Trim +Vo Trim up Trim down Formula for resistance of TRIM up: a= Vref Vo ’-Vref R1 R= T aR2 R -a 2 -R3 down: a= Vref Vo ’-Vref R2 R= T aR1 R -a 1 -R3 Note: Leave open if not used. Value for R1, R2, R3, and Vref refer to the above table 1. RT: Resistance of Trim. a: User-defined parameter, no actual meanings. Vo ’: The trim up/down voltage. |
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