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PI6C20400SLE Datasheet(PDF) 2 Page - Pericom Semiconductor Corporation |
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PI6C20400SLE Datasheet(HTML) 2 Page - Pericom Semiconductor Corporation |
2 / 10 page 2 PS8931A 12/10/07 PI6C20400S 1:4 Clock Driver for Intel PCI Express Chipsets Pin Descriptions Pin Name Type Pin No Description SRC & SRC# Input 2, 3 0.7V Differential SRC input from PI6C410 clock synthesizer OE_0 & OE_3 Input 8, 21 3.3V LVTTL input for enabling outputs, active high. OE_0 for OUT0 / OUT0# OE_3 for OUT3 / OUT3# OE_INV Input 25 3.3V LVTTL input for inverting the OE, SRC_STOP# and PWRDWN# pins. When 0 = same stage When 1 = OE_0, OE_3, SRC_STOP#, PWRDWN# inverted. OUT[0:3] & OUT[0:3]# Output 6, 7, 9, 10, 19, 20, 22, 23 0.7V Differential outputs PLL/BYPASS# Input 12 3.3V LVTTL input for selecting fan-out of PLL operation. SCLK Input 13 SMBus compatible SCLOCK input SDA I/O 14 SMBus compatible SDATA IREF Input 26 External resistor connection to set the differential output current SRC_STOP# Input 16 3.3V LVTTL input for SRC stop, active low PLL_BW# Input 17 3.3V LVTTL input for selecting the PLL bandwidth PWRDWN# Input 15 3.3V LVTTL input for Power Down operation, active low VDD Power 1, 5, 11, 18, 24 3.3V Power Supply for Outputs VSS Ground 4 Ground for Outputs VSS_A Ground 27 Ground for PLL VDD_A Power 28 3.3V Power Supply for PLL Serial Data Interface (SMBus) PI6C20400S is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit address and read/write bit as shown below. Address assignment A6 A5 A4 A3 A2 A1 A0 R/W 110 1 1 1 0 0/1 Data Protocol 1 bit 7 bits 1 1 8 bits 1 8 bits 1 8 bits 1 8 bits 1 1 bit Start bit Slave Addr R/W Ack Register offset Ack Byte Count = N Ack Data Byte 0 Ack … Data Byte N - 1 Ack Stop bit Notes: 1. Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0. 07-0265 |
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