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LM5088Q Datasheet(PDF) 3 Page - Texas Instruments |
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LM5088Q Datasheet(HTML) 3 Page - Texas Instruments |
3 / 36 page LM5088 www.ti.com SNVS600G – DECEMBER 2008 – REVISED MARCH 2011 PIN DESCRIPTIONS Pin(s) Name Description Application Information 1 VIN Input supply voltage IC supply voltage. The operating range is 4.5V to 75V 2 EN Enable input If the EN pin voltage is below 0.4V the regulator will be in a low power state. If the EN pin voltage is between 0.4V and 1.2V the controller will be in standby mode. If the EN pin voltage is above 1.2V the controller will be operational. An external voltage divider can be used to set a line under voltage shutdown threshold. If the EN pin is left open, a 5µA pull-up current forces the pin to the high state and enables the controller. 3 SS Soft-start When SS is below the internal 1.2V reference, the SS voltage will control the error amplifier. An internal 11 µA current source charges an external capacitor to set the start-up rate of the controller. The SS pin is held low in the standby, VCC UV and thermal shutdown states. The SS pin can be used for voltage tracking by connecting this pin to a master voltage supply less than 1.2V. The applied voltage will act as the reference for the error amplifier. 4 RAMP Ramp control signal An external capacitor connected between this pin and the GND pin sets the ramp slope used for emulated current mode control. Recommended capacitor range 100 pF to 2000 pF. See the Applications section for selection of capacitor value. 5 RT/SYNC Internal oscillator frequency The internal oscillator is programmed with a single resistor between this pin and set input and synchronization the GND pin. The recommended frequency range is 50 kHz to 1 MHz. An input external synchronization signal, which is higher in frequency than the programmed frequency, can be applied to this pin through a small coupling capacitor. The RT resistor to ground is required even when using external synchronization. 6 GND Ground Ground return. 7 COMP Output of the internal error The loop compensation network should be connected between this pin and the amplifier FB pin. 8 FB Feedback signal from the This pin is connected to the inverting input of the internal error amplifier. The regulated output regulation threshold is 1.205V. 9 OUT Output voltage connection Connect directly to the regulated output voltage. 10 DITH Frequency Dithering ( A capacitor connected between DITH pin and GND is charged and discharged by LM5088-1 Only) 27 µA current sources. As the voltage on the DITH pin ramps up and down, the oscillator frequency is modulated between -5% to +5% of the nominal frequency set by the RT resistor. Grounding the DITH pin will disable the frequency dithering mode. 10 RES Hiccup Mode Restart ( The RES pin is normally connected to an external capacitor that sets the timing LM5088-2 Only) for hiccup mode current limiting. In normal operation, a 25µA current source discharges the RES pin capacitor to ground. If cycle-by-cycle current limit threshold is exceeded during any PWM cycle, the current sink is disabled and RES capacitor is charged by an internal 50 µA current. If the RES voltage reaches 1.2V, the HG pin gate drive signal will be disabled and the RES pin capacitor will be discharged by a 1 µA current sink. Normal operation will resume when the RES pin falls below 0.2V. 11 CSG Current Sense Ground Low side reference for the current sense resistor. 12 CS Current sense Current measurement connection for the re-circulating diode. An external sense resistor and an internal sample/hold circuit sense the diode current at the conclusion of the buck switch off-time. This current measurement provides the DC offset level for the emulated current ramp. 13 SW Switching node Connect to the source terminal of the external MOSFET switch. 14 HG High Gate Connect to the gate terminal of the external MOSFET switch. 15 BOOT Input for bootstrap capacitor An external capacitor is required between the BOOT and the SW pins to provide bias to the MOSFET gate driver. The capacitor is charged from VCC via an internal diode during the off-time of the buck switch. 16 VCC Output of the bias regulator VCC tracks VIN up to the regulation level (7.8V Typ). A 0.1 µF to 10 µF ceramic decoupling capacitor is required. An external voltage between 8.3V and 13V can be applied to this pin to reduce internal power dissipation. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Copyright © 2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM5088 |
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