10

MB15E03

When designing a synthesizer, the FC pin setting depends on the VCO and LPF characteristics.

Power Saving Mode (Intermittent Mode Control Circuit)

Setting a PS pin to Low, the IC enters into power saving mode resultatly current sonsumption can be limited to

10

µA (max.). Setting PS pin to High, power saving mode is released so that the IC works normally.

In addition, the intermittent operation control circuit is included which helps smooth start up from the power saving

mode. In general, the power consumption can be saved by the intermittent operation that powering down or waking

up the synthesizer. Such case, if the PLL is powered up uncontrolled, the resulting phase comparator output signal

To prevent this, the intermittent operation control circuit enforces a limited error signal output of the phase detector

during power up, thus keeping the loop locked.

During the power saving mode, the corresponding section except for indispensable circuit for the power saving

function stops working, then current consumption is reduced to 10

µA (max.).

At that time, the Do and LD become the same state as when a loop is locking. That is, the Do becomes high

impedance.

A VCO control voltage is naturally kept at the locking voltage which defined by a LPF”s time constant. As a result

of this, VCO’s frequency is kept at the locking frequency.

Note:

• While the power saving mode is executed, ZC pin should be set at ”H” or open. If ZC is set at ”L”

during power saving mode, approximately 10

µA current flows.

• PS pin must be set ”L” at Power-ON.

• The power saving mode can be released (PS : L → H) 1

µs later after power supply remains stable.

• During the power saving mode, it is possible to input the serial data.

Table.8 PS Pin Setting

PS pin

Status

H

Normal mode

L

Power saving mode

LPF Input Voltage

VCO

Output

Frequency

(1)

(2)

similar to (1), set FC bit high.

(2), set FC bit low.

PLL

LPF

VC