7

MB40C238

s DIAGRAM

s DIGITAL OUTPUT BUFFER LOAD CIRCUIT

s USAGE PRECAUTIONS

capacitor as close as possible to the pin.

• You can minimize the power supply current dissipation due to the internal logic indetermination by making the

clock to 4CLK or higher.

1.5 V

3 V

0 V

CLK

To the

measurement

point

Measurement point