 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ISL6341CRZ Datasheet(PDF) 11 Page - Intersil Corporation |
|
||||||||||||||||||||||||||||||
ISL6341CRZ Datasheet(HTML) 11 Page - Intersil Corporation |
|
|
11 / 17 page  11 FN6538.2 December 2, 2008 PGOOD The PGOOD function output monitors the output voltage using the same VOS pin and resistor divider of the undervoltage and overvoltage protection, but with separate comparators for each. The rising OV trip point (10% above 0.8V = 0.88V nominal on VOS) and the falling UV trip point (10% below 0.8V = 0.72V nominal on VOS) will trip sooner than the protection, in order to give an early warning to a possible problem. The response time of the comparators should be less than 1µs; the separate VOS input is not slowed down by the compensation on the FB pin. It is NOT recommended to connect the VOS pin to the FB pin, in order to share the resistor divider. If the VOS pin is accidentally disconnected, a small bias current on-chip will force an overvoltage condition. Figure 9 shows how the PGOOD output responds to a ramp that trips in each direction (without reaching either protection trip point at ±25%); PGOOD is valid (high) as long as VOUT (and thus VOS) is within the ±10% window. The PGOOD output is an open-drain pull-down NMOS device; it can deliver 4.0mA of sink current at 0.3V when power is NOT GOOD. A pull-up resistor to an external supply voltage sets the high level voltage when power is GOOD. The supply should be ≤6.0V, and is usually the one that powers the logic monitoring the PGOOD output. If PGOOD function is not used, the PGOOD pin can be left floating. The PGOOD pin will be held low once VCC is above the rising POR trip point, and during soft-start (but if the PGOOD supply is up before or with VCC, it may be pulled high initially until the logic has enough voltage to turn on the output). Once the soft-start ramp is done (VOUT, VOS and FB should each be at 100% of their final value), the PGOOD pin will be allowed to go high, if the output voltage is within the expected window. There is no additional delay after soft-start is done. Note that the overcurrent protection does directly affect the PGOOD output, before the output voltage monitoring would sense when VOUT drops 10%. The overvoltage and undervoltage protection circuits don’t directly effect PGOOD, but since the PGOOD UV and OV windows are tighter, the PGOOD output should already be low by the time either protection is tripped. Switching Frequency The switching frequency is a fixed 300kHz for the ISL6341, ISL6341C and 600kHz for the ISL6341A, ISL6341B. It cannot be adjusted externally, and the various soft-start delays and ramps are fixed at the same times for either frequency. Output Voltage Selection The output voltage can be programmed to any level between the 0.8V internal reference, up to the VIN supply, with the 85% duty cycle restriction for the ISL6341, ISL6341C (75% for the ISL6341A, ISL6341B). Additional duty cycle margin due to the rDS(ON) drop across the upper FET at maximum load needs to be factored in as well. An external resistor divider is used to scale the output voltage relative to the internal reference voltage, and feed it back to the inverting input of the error amp. See the “Typical Application” schematic on page 3 for more detail; RS is the upper resistor; ROFFSET (shortened to RO below) is the lower one. The recommended value for RS is 1kΩ to 5kΩ (±1% for accuracy) and then ROFFSET is chosen according to Equation 2. Since RS is part of the compensation circuit (see “Feedback Compensation” on page 13), it is often easier to change ROFFSET to change the output voltage; that way the compensation calculations do not need to be VOUT (0.25V/DIV) GND> 110% 90% GND> PGOOD (2V/DIV) FIGURE 9. PGOOD UNDERVOLTAGE AND OVERVOLTAGE TABLE 2. PROTECTION SUMMARY PROTECTION ACTION TAKEN ENABLED AFTER RESET BY OCP ISL6341 ISL6341B VOUT latches off; LGATE and UGATE low. POR or COMP/EN POR or COMP/EN OCP ISL6341A ISL6341C Infinite retries; wait ~10ms, and try a new Soft-Start ramp. ISL6341C has UVP disabled POR or COMP/EN Not Applicable UVP (-25%) VOUT latches off; LGATE and UGATE low. ISL6341C has UVP disabled after SS ramp POR OVP (+25%) VOUT latches off; UGATE low; LGATE goes low and high to keep VOUT within 50% and 125% of nominal. VOS pin open will trigger OV. POR POR PGOOD (UV; -10%) PGOOD goes low if VOS is 10% too low. after SS ramp POR or COMP/EN PGOOD (OV; +10%) PGOOD goes low if VOS is 10% too high. after SS ramp POR or COMP/EN PGOOD (OCP) PGOOD goes low if OCP trips after SS ramp POR or COMP/EN or good SS ramp ISL6341, ISL6341A, ISL6341B, ISL6341C |
Similar Part No. - ISL6341CRZ |
|
Similar Description - ISL6341CRZ |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
