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MB89PV140 Datasheet(PDF) 3 Page - Fujitsu Component Limited. |
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MB89PV140 Datasheet(HTML) 3 Page - Fujitsu Component Limited. |
3 / 50 page 3 MB89140 Series s PRODUCT LINEUP (Continued) MB89145 MB89146 MB89P147 MB89PV140 Classification Mass production products (mask ROM products) One-time PROM/ EPROM product Piggyback/ evaluation product (for evaluation and development) ROM size 16 K × 8 bits (internal mask ROM) 24 K × 8 bits (internal mask ROM) 32 K × 8 bits (internal PROM) 32 K × 8 bits (external ROM) RAM size 512 × 8 bits 768 × 8 bits 1 K × 8 bits CPU functions Number of instructions: 136 Instruction bit length: 8 bits Instruction length: 1 to 3 bytes Data bit length: 1, 8, 16 bits Minimum execution time: 0.5 µs/8 MHz to 8.0 µs/8 MHz, 61 µs/32.768 kHz Interrupt processing time: 4.5 µs/8 MHz to 72.0 µs/8 MHz, 562.5 µs/32.768 kHz Note: The above times change according to the gear function. Ports High-voltage output port (P-ch open-drain): 8 (P60 to P67, for heavy current) 16 (P40 to P47, P50 to P57 for low current) Buzzer output (P-ch open-drain, high-voltage): 1 (heavy current) Output ports (CMOS): 4 (P20 to P23) Input ports (CMOS): 2 (P70 and P71, function as X0A and XIA pins when dual-clock system is used.) I/O ports (CMOS): 23 (P00 to P07, P10 to P17, P30, and P32 to P37) I/O ports (N-ch open-drain): 1 (P31) Total: 55 Clock timer 21 bits × 1 (in main clock mode), 15 bits × 1 (at 32.768 kHz) 8-bit PWM timer (timer 1) 8-bit timer operation (toggled output capable, operating clock: 1, 2, 8, 16 system clock cycles) 8-bit resolution PWM operation (conversion cycle: 128 µs to 2.0 ms at 8.0-MHz oscillation, and highest gear speed) 12-bit MPG (timer 4) 12-bit resolution PWM operation (maximum conversion cycle of 2048.4 µs to 16.4 ms at 8.0 MHz-oscillation, and highest gear speed) 12-bit resolution reload timer operation (toggled output capable) 12-bit resolution PPG operation (minimum resolution of 0.5 µs at 8.0-MHz oscillation, and highest gear speed) 8/16-bit timer counter (timer 2, 3) 8/16-bit timer operation (operating clock, internal clock, external trigger) 8/16-bit event counter operation (Rising edge/falling edge/both edges selectability) Parameter Part number |
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