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MB84VD22193EC-90-PBS Datasheet(PDF) 4 Page - Fujitsu Component Limited. |
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MB84VD22193EC-90-PBS Datasheet(HTML) 4 Page - Fujitsu Component Limited. |
4 / 61 page MB84VD2218XEC/EE/2219XEC/EE-90 4 s s s s PIN DESCRIPTION Pin Name Function Input/Output A0 to A17 Address Inputs (Common) I A–1, A18 to A20 Address Input (Flash) I SA Address Input (SRAM) I DQ0 to DQ15 Data Inputs/Outputs (Common) I/O CEf Chip Enable (Flash) I CE1s Chip Enable (SRAM) I CE2s Chip Enable (SRAM) I OE Output Enable (Common) I WE Write Enable (Common) I RY/BY Ready/Busy Outputs (Flash) Open Drain Output O UBs Upper Byte Control (SRAM) I LBs Lower Byte Control (SRAM) I CIOf I/O Configuration (Flash) CIOf = VIH is Word mode (×16), CIOf = VIL is Byte mode (×8) I CIOs I/O Configuration (SRAM) CIOs = VIH is Word mode (×16), CIOs = VIL is Byte mode (×8) I RESET Hardware Reset Pin/Sector Protection Unlock (Flash) I WP/ACC Write Protect / Acceleration (Flash) I N.C. No Internal Connection — VSS Device Ground (Common) Power VCCf Device Power Supply (Flash) Power VCCs Device Power Supply (SRAM) Power |
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