EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS

Gain

Stage

+EQ

RBBDC

VBB

Self-BiasingNetwork

Line-EndTermination

VCC

VCC

ESD

IN+

IN–

RT(SE)

RT(SE)

VOCM

OUT–

OUT+

1pF

SN65LVCP202

Figure 1. Equivalent Input Circuit Design

Figure 2. Common-Mode Output Voltage Test Circuit

Table 1. CROSSPOINT LOGIC TABLE

OUTPUT CHANNEL 1 (1Y/1Z)

OUTPUT CHANNEL 2 (2Y/2Z)

CONTROL

INPUT

CONTROL

INPUT

PINS, S1x

SELECTED

PINS, S2x

SELECTED

0

1A/1B

0

1A/1B

1

2A/2B

1

2A/2B

AVAILABLE OPTIONS

DESCRIPTION

RGE (24-Pin) (Orderable)

–40°C to 85°C

Serial multiplexer

SN65LVCP202RGE

(1)

The package is available taped and reeled. Add an R suffix to device types (e.g., SN65LVCP202RGER).

(2)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

Copyright © 2009, Texas Instruments Incorporated

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Product Folder Link(s): SN65LVCP202