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MSP430F110IPWR Datasheet(PDF) 8 Page - Texas Instruments |
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MSP430F110IPWR Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 34 page  MSP430F11x MIXED SIGNAL MICROCONTROLLER SLAS256D − NOVEMBER 1999 − REVISED SEPTEMBER 2004 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 memory organization 01FFh MSP430F112 Int. Vector 1 KB Flash Segment0,1 128B RAM 16b Per. 8b Per. SFR FFDFh FC00h 027Fh 0200h 0100h 00FFh 0010h 000Fh 0000h MSP430F110 1 KB Boot ROM 128B Flash SegmentA 10FFh 1080h 0C00h 0FFFh FFFFh FFE0h Int. Vector 4 KB Flash Segment0−7 256B RAM 16b Per. 8b Per. SFR FFFFh FFE0h FFDFh 02FFh 0200h 0100h 00FFh 0010h 000Fh 0000h F000h Main Memory 10FFh 2 × 128B Flash SegmentA,B Information Memory 1000h 1 KB Boot ROM 0FFFh 0C00h 01FFh bootstrap loader (BSL) The MSP430 bootstrap loader (BSL) enables users to program the flash memory or RAM using a UART serial interface. Access to the MSP430 memory via the BSL is protected by user-defined password. For complete description of the features of the BSL and its implementation, see the Application report Features of the MSP430 Bootstrap Loader, Literature Number SLAA089. BSL Function DW & PW Package Pins Data Transmit 14 - P1.1 Data Receive 10 - P2.2 flash memory The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include: D Flash memory has n segments of main memory and two segments of information memory (A and B) of 128 bytes each. Each segment in main memory is 512 bytes in size. D Segments 0 to n may be erased in one step, or each segment may be individually erased. D Segments A and B can be erased individually, or as a group with segments 0−n. Segments A and B are also called information memory. D New devices may have some bytes programmed in the information memory (needed for test during manufacturing). The user should perform an erase of the information memory prior to the first use. |
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