IN+

IN-

VOS=1.2V typical

VID

IN-

IN+

DS90CP02

www.ti.com

SNLS267 – NOVEMBER 2008

Electrical Characteristics (continued)

Over recommended operating supply and temperature ranges unless other specified.

Typ

Symbol

Parameter

Conditions

Min

Max

Units

(1)

Output Channel to Channel Skew

0

130

315

ps

Splitter mode (any one input to all

outputs).

Jitter

RJ - Clock Pattern

1.4

2.5

psrms

(4)

DJ - K28.5 Pattern

42

75

psp-p

93

126

psp-p

LVDS Output Enable Time

Time from ENx to OUT± change from

50

110

150

ns

TRI-STATE to active.

LVDS Output Disable Time

Time from ENx to OUT± change from

5

12

ns

active to TRI-STATE.

LVDS Switching Time

Time from configuration select (SELx) to

SELx to OUT±

new switch configuration effective for

110

150

ns

OUT±.

(4)

Jitter is not production tested, but guaranteed through characterization on a sample basis.

(5)

(6)

(7)

Total Jitter, or TJ, is measured peak to peak with a histogram including 3500 window hits. Stimulus and fixture jitter has been

Timing Diagrams

Figure 4. LVDS Signals

Copyright © 2008, Texas Instruments Incorporated

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