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ADC12048CIV Datasheet(PDF) 4 Page - Texas Instruments |
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ADC12048CIV Datasheet(HTML) 4 Page - Texas Instruments |
4 / 37 page ADC12048 SNAS105B – APRIL 2000 – REVISED MARCH 2013 www.ti.com PIN DESCRIPTION (continued) PLCC Pkg. PQFP Pkg. Pin Name Description Pin Number Pin Number 10 4 VA+ Analog supply input pin. The device operating supply voltage range is +5V ±10%. Accuracy is ensured only if the VA+ and VD+ are connected to the same potential. This pin should be bypassed to AGND with a parallel combination of a 10 μF and a 0.1 μF (ceramic) capacitor. The capacitors should be placed as close to the supply pins of the part as possible. 11 5 AGND Analog ground pin. This is the device's analog supply ground connection. It should be connected through a low resistance and low inductance ground return to the system power supply. 32 and 41 26 and 35 VD+ Digital supply input pins. The device operating supply voltage range is +5V ±10%. Accuracy is ensured only if the VA+ and VD+ are connected to the same potential. This pin should be bypassed to DGND with a parallel combination of a 10 μF and a 0.1 μF (ceramic) capacitor. The capacitors should be placed as close to the supply pins of the part as possible. 33 and 42 27 and 36 DGND Digital ground pin. This is the device's digital supply ground connection. It should be connected through a low resistance and low inductance ground return to the system power supply. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Supply Voltage (VA+ and VD+) 6.0V Voltage at all Inputs −0.3V to V+ + 0.3V |VA+ − VD+| 300 mV |AGND − DGND| 300 mV Input Current at Any Pin(4) ±30 mA Package Input Current(4) ±120 mA Power Dissipation at TA = 25°C (5) 875 mW Storage Temperature −65°C to +150°C Vapor Phase (60 sec.) 210°C PGB Package Lead Temperature Infared (15 sec.) 220°C FN Package Infared (15 sec.) 300°C ESD Susceptibility(6) 3.0 kV (1) All voltages are measured with respect to GND, unless otherwise specified. (2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The specified specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. (3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (4) When the input voltage (VIN) at any pin exceeds the power supply rails (VIN < GND or VIN > (VA+ or VD+)), the current at that pin should be limited to 30 mA. The 120 mA maximum package input current limits the number of pins that can safely exceed the power supplies with an input current of 30 mA to four. (5) The maximum power dissipation must he derated at elevated temperatures and is dictated by TJmax, (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax − TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For this device, TJmax = 150°C, and the typical thermal resistance (θJA) of the ADC12048 in the FN package, when board mounted, is 55°C/W, and in the PGB package, when board mounted, is 67.8°C/W. (6) Human body model, 100 pF discharged through 1.5 k Ω resistor. 4 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: ADC12048 |
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