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ADS1253EG4 Datasheet(PDF) 7 Page - Texas Instruments

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Part # ADS1253EG4
Description  24-Bit, 20kHz, Low-Power ANALOG-TO-DIGITAL CONVERTER
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADS1253EG4 Datasheet(HTML) 7 Page - Texas Instruments

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ADS1253
SBAS199B
7
www.ti.com
THEORY OF OPERATION
The ADS1253 is a precision, high-dynamic range, 24-bit,
delta-sigma, A/D converter capable of achieving very high-
resolution digital results at high data rates. The analog-input
signal is sampled at a rate determined by the frequency of the
system clock (CLK). The sampled analog input is modulated
by the delta-sigma A/D modulator, which is followed by a
digital filter. A Sinc5 digital low-pass filter processes the
output of the delta-sigma modulator and writes the result into
the data-output register. The DOUT/DRDY pin is pulled
LOW, indicating that new data is available to be read by the
external microcontroller/microprocessor. As shown in the
block diagram on the front page, the main functional blocks
of the ADS1253 are the 4th-order delta-sigma modulator, a
digital filter, control logic, input multiplexer, and a serial
interface. Each of these functional blocks is described in the
following sections.
ANALOG INPUT
The ADS1253 contains a fully differential analog input. In order
to provide low system noise, common-mode rejection of 98dB,
and excellent power-supply rejection, the design topology is
based on a fully differential switched-capacitor architecture.
The bipolar input voltage range is from –4.096 to +4.096V,
when the reference input voltage equals +4.096V. The bipolar
range is with respect to –VIN, and not with respect to GND.
The input impedance of the analog input changes with the
ADS1253 system clock frequency (CLK). The relationship is:
AIN Impedance (Ω) = (8MHz/CLK) • 210,000
See application note
Understanding the ADS1251, ADS1253,
and ADS1254 Input Circuitry (SBAA086), available for down-
load from TI’s web site www.ti.com.
With regard to the analog-input signal, the overall analog
performance of the device is affected by three items: first, the
input impedance can affect accuracy. If the source impedance
of the input signal is significant, or if there is passive filtering
prior to the ADS1253, a significant portion of the signal can be
lost across this external impedance. The magnitude of the
effect is dependent on the desired system performance.
Second, the current into or out of the analog inputs must be
limited. Under no conditions should the current into or out of
the analog inputs exceed 10mA.
Third, to prevent aliasing of the input signal, the analog-input
signal must be band limited. The bandwidth of the A/D
converter is a function of the system clock frequency. With a
system clock frequency of 8MHz, the data-output rate is
20.8kHz with a –3dB frequency of 4.24kHz. The –3dB fre-
quency scales with the system clock frequency.
To ensure the best linearity of the ADS1253, a fully differen-
tial signal is recommended, and the capacitance to ground
must be equal on both sides.
For more information about the ADS1253’s input structure,
please refer to application note SBAA086 located at www.ti.com.
FIGURE 1. Level-Shift Circuit for Bipolar Input Ranges.
INPUT MULTIPLEXER
The CHS1 and CHS0 pins are used to select the analog input
channel, as shown in Table I. The recommended method for
changing channels is to change the channel after the conver-
sion from the previous channel has been completed and
read. When a channel is changed, internal logic senses the
change on the falling edge of CLK and resets the conversion
process. The conversion data from the new channel is valid
on the first DRDY after the channel change.
CHSEL1
CHSEL0
CHANNEL
0
0
CH1
0
1
CH2
1
0
CH3
1
1
CH4
TABLE I. Channel Selection.
When multiplexing inputs, it is possible to achieve sample
rates close to 4kHz. This is due to the fact that it requires five
internal conversion cycles for the data to fully settle, the data
also must be read before the channel is changed. The DRDY
signal indicates a valid result after the five cycles have
occurred.
BIPOLAR INPUT
Each of the differential inputs of the ADS1253 must stay
between AGND – 0.3V and VDD + 0.3V. With a reference
voltage at less than half of VDD, one input can be tied to the
reference voltage, and the other input can range from 0V to
2 • VREF. By using a three op amp circuit featuring a single
amplifier and four external resistors, the ADS1253 can be
configured to accept bipolar inputs referenced to ground. The
conventional
±2.5V, ±5V, and ±10V input ranges can be
interfaced to the ADS1253 using the resistor values shown in
Figure 1.
10k
20k
R
1
OPA4350
OPA4350
OPA4350
+IN
–IN
V
REF
ADS1253
R2
Bipolar
Input
REF
2.5V
BIPOLAR INPUT
R1
R2
±10V
2.5k
5k
±5V
5k
10k
±2.5V
10k
20k


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