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ADS820E1K Datasheet(PDF) 3 Page - Texas Instruments |
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ADS820E1K Datasheet(HTML) 3 Page - Texas Instruments |
3 / 21 page www.ti.com ADS820 3 SBAS037B ADS820U, E PARAMETER CONDITIONS TEMP MIN TYP MAX UNITS ELECTRICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = +5V, Sampling Rate = 20MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted. NOTE: (1) dBFS refers to dB below Full Scale. (2) Percentage accuracies are referred to the internal A/D Converter Full-Scale Range of 4Vp-p. (3) IMD is referred to the larger of the two input signals. If referred to the peak envelope signal ( ≈ 0dB), the intermodulation products will be 7dB lower. (4) Based on (SINAD – 1.76)/6.02. (5) No “rollover” of bits. Signal-to-Noise Ratio (SNR) f = 500kHz (–1dBFS input) +25 °C 58 60.5 dB Full 56 60 dB f = 10MHz (–1dBFS input) +25 °C58 60 dB Full 56 60 dB Signal-to-(Noise + Distortion) (SINAD) f = 500kHz (–1dBFS input) +25 °C 58 60.5 dB Full 55 60 dB f = 10MHz (–1dBFS input) +25 °C56 58 dB Full 54 57 dB Differential Gain Error NTSC or PAL +25 °C 0.5 % Differential Phase Error NTSC or PAL +25 °C 0.1 degrees Effective Bits(4) fIN = 3.58MHz 9.5 Bits Aperture Delay Time +25 °C2 ns Aperture Jitter +25 °C 7 ps rms Overvoltage Recovery Time(5) 1.5x Full-Scale Input +25 °C2 ns OUTPUTS Logic Family TTL/HCT Compatible CMOS Logic Coding Logic Selectable SOB or BTC V Logic Levels Logic LOW, CL = 15pF Full 0 0.4 V Logic HIGH, CL = 15pF Full 2.5 +VS V 3-State Enable Time 20 40 ns 3-State Disable Time Full 2 10 ns POWER-SUPPLY REQUIREMENTS Supply Voltage: +VS Operating Full +4.75 +5 +5.25 V Supply Current: +IS Operating +25 °C39 47 mA Operating Full 40 55 mA Power Consumption Operating +25 °C 195 235 mW Operating Full 200 275 mW Thermal Resistance, θ JA SO-28 75 °C/W |
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