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TLC2554 Datasheet(PDF) 1 Page - Texas Instruments |
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TLC2554 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 50 page TLC2554, TLC2558 5-V, 12-BIT, 400 KSPS, 4/8 CHANNEL, LOW POWER, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN SLAS220A –JUNE 1999 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Maximum Throughput 400 KSPS D Built-In Reference and 8× FIFO D Differential/Integral Nonlinearity Error: ±1 LSB D Signal-to-Noise and Distortion Ratio: 69 dB, fi = 12 kHz D Spurious Free Dynamic Range: 75 dB, fi = 12 kHz D SPI/DSP-Compatible Serial Interfaces With SCLK up to 20 MHz D Single Supply 5 Vdc D Analog Input Range 0 V to Supply Voltage With 500 kHz BW D Hardware Controlled and Programmable Sampling Period D Low Operating Current (4 mA at 5.5 V External Ref, 6 mA at 5.5 V, Internal Ref) D Power Down: Software/Hardware Power-Down Mode (1 µA Max, Ext Ref), Auto Power-Down Mode (1 µA, Ext Ref) D Programmable Auto-Channel Sweep 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 SDO SDI SCLK EOC/(INT) VCC A0 A1 A2 A3 A4 CS REFP REFM FS PWDN GND CSTART A7 A6 A5 DW OR PW PACKAGE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SDO SDI SCLK EOC/(INT) VCC A0 A1 A2 CS REFP REFM FS PWDN GND CSTART A3 D OR PW PACKAGE (TOP VIEW) (TOP VIEW) description The TLC2558 and TLC2554 are a family of high-performance, 12-bit low power, 1.6 µs, CMOS analog-to-digital converters (ADC) which operate from a single 5 V power supply. These devices have three digital inputs and a 3-state output [chip select (CS), serial input-output clock (SCLK), serial data input (SDI), and serial data output (SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a DSP, a frame sync (FS) signal is used to indicate the start of a serial data frame. In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip analog multiplexer that can select any analog inputs or one of three internal self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK edge (normal sampling) or can be controlled by a special pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short (12 SCLKs) or as long (24 SCLKs) to accommodate faster SCLK operation popular among high-performance signal processors. The TLC2558 and TLC2554 are designed to operate with very low power consumption. The power-saving feature is further enhanced with software/hardware/auto power down modes and programmable conversion speeds. The converter uses the external SCLK as the source of the conversion clock to achieve higher (up to 1.6 µs when a 20 MHz SCLK is used) conversion speed. There is a 4-V internal reference available. An optional external reference can also be used to achieve maximum flexibility. Copyright © 1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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