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TLV1570CPWRG4 Datasheet(PDF) 6 Page - Texas Instruments |
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TLV1570CPWRG4 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 33 page TLV1570 2.7 V TO 5.5 V 8-CHANNEL 10-BIT 1.25-MSPS SERIAL ANALOG-TO-DIGITAL CONVERTER SLAS169B – DECEMBER 1997– REVISED OCTOBER 2000 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 initialization-software sequence This sequence shows the default settings, unless otherwise specified. The ADC requires that the user write to it every cycle. There is a cycle delay before control bits are implemented. Example 1. Normal Sample Mode With Internal Reference CYCLE WRITE TO SDIN CHANNEL SAMPLED OUTPUT FROM SDOUT COMMENT 1st 0040h N/A Invalid No analog input channel sampled 2nd 01C0h N/A Invalid No analog input channel sampled 3rd 0040h 3 From Channel 3 4th 8040h 0 From Channel 0 Software power down enabled 5th 0040h N/A Invalid Software power-down mode, no analog input channel sampled Wait 800 ns Recovery time, no analog input channel sampled (16 SCLKs if AVDD = 5 V and fCLK = 20 MHz) 6th 0140h N/A Invalid Recovery time, no analog input channel sampled 7th 0040h 2 From Channel 2 Example 2. Auto Scan Mode CYCLE WRITE TO SDIN CHANNEL SAMPLED OUTPUT FROM SDOUT COMMENT 1st 0480h N/A Invalid Autoscan reset enabled, no analog input channel sampled 2nd 0480h N/A Invalid No analog input channel sampled 3rd 0400h 0 From Channel 0 4th 0400h 1 From Channel 1 5th 0400h 2 From Channel 2 6th 0400h 3 From Channel 3 7th 0400h 4 From Channel 4 8th 0400h 5 From Channel 5 9th 0400h 6 From Channel 6 10th 0400h 7 From Channel 7 11th 0400h 0 From Channel 0 NOTE: If software power down is enabled during auto-scan mode, the next channel in the sequence is skipped. |
Similar Part No. - TLV1570CPWRG4 |
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Similar Description - TLV1570CPWRG4 |
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