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SP707CU-LTR Datasheet(PDF) 11 Page - Exar Corporation

Part # SP707CU-LTR
Description  Low Power Microprocessor Supervisory Circuits
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

SP707CU-LTR Datasheet(HTML) 11 Page - Exar Corporation

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© 2010 Exar Corporation
11/17
Rev. 2.0.0
MONITORING VOLTAGES OTHER THAN THE
UNREGULATED DC INPUT
Monitor voltages other than the unregulated
DC by connecting a voltage divider to PFI and
adjusting the ratio appropriately. If required,
add hysteresis by connecting a resistor (with a
value approximately 10 times the sum of the
two resistors in the potential divider network)
between PFI and PFO. A capacitor between PFI
and GND will reduce the power-fail circuit's
sensitivity to high-frequency noise on the line
being monitored. RESET can be used to
monitor voltages other than the +5V VCC line.
Connect PFO to MR to initiate a RESET pulse
when PFI drops below 1.25V. Figure 21 shows
the SP705/706/707/708 configured to assert
RESET when the +5V supply falls below the
RESET threshold, or when the +12V supply
falls below approximately 11V.
Fig. 21: Monitoring +5V and +12V Power Supplies
MONITORING A NEGATIVE VOLTAGE SUPPLY
The power-fail comparator can also monitor a
negative supply rail, shown in Figure 22. When
the negative rail is good (a negative voltage of
large magnitude), PFO is LOW. By adding the
resistors and transistor as shown, a HIGH PFO
triggers RESET. As long as PFO remains HIGH,
the SP705-708/813L will keep RESET asserted
(where RESET = LOW and RESET = HIGH).
Note that this circuit's accuracy depends on
the PFI threshold tolerance, the VCC line, and
the resistors.
Fig. 22: Monitoring a Negative Voltage Supply
INTERFACING TO µPS WITH BIDIRECTIONAL
RESET PINS
µPs with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
SP705/706/707/708 RESET output. If, for
example, the RESET output is driven HIGH and
the µP wants to pull it LOW, indeterminate
logic levels may result. To correct this,
connect a 4.7KΩ resistor between the RESET
output and the µP reset I/O, as shown if
Figure 23. Buffer the RESET output to other
system components.


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