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MAX11270 Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX11270 Datasheet(HTML) 7 Page - Maxim Integrated Products |
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7 / 46 page  Electrical Characteristics (continued) (VAVDD = 3.6V, VAVSS = 0V, VDVDD = 2.0V, VREFP = 2.5V, VREFN = 0V; fDATA = 1000sps, External Clock = 8.192MHz; Continuous conversion mode (SCYCLE = 0); PGA maximum output is 300mV below AVDD and minimum output is 300mV above AVSS , TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ANALOG INPUTS/REFERENCE INPUTS AIN Voltage Range VRNG Unipolar 0 VREF V Bipolar -VREF VREF Absolute Input Voltage VABSRNG Bypass mode VAVSS VAVDD V PGA mode VAVSS + 0.3 VAVDD - 1.3 Buffer mode VAVSS + 0.1 VAVDD - 0.1 AIN DC Input Leakage (Note 4) IINLEAK Sleep mode enabled -10 +10 nA AIN Common-Mode Input Conductance GAINCM Bypass ±8 nA/V AIN Common-Mode Input Current IAINCM Buffer ±500 nA PGA ±21 nA AIN Differential Mode Input Conductance GAINDIFF Bypass ±23 µA/V AIN Differential Mode Input Current IAINDIFF Buffer ±20 nA PGA ±0.15 nA REF Differential Input Conductance GREFDIFF Active conversion state ±46.5 µA/V REF Input Current at Power Down IREF_PD Sleep and Standby states ±2.5 µA/V AIN Input Capacitance CIN Buffer disabled 3 pF REF Input Capacitance CREF Buffer disabled 4.5 pF Input and REF Sampling Rate fS 4.096 MHz VREFP - VREFN Voltage Range VRABSRNG (Note 5) VAVDD V REF Voltage Range VREF 1.5 VAVDD V DIGITAL FILTER RESPONSE SINC FILTER Bandwidth (-3dB) BWSINC 0.203 fDATA Settling Time (Latency) 5 1/fDATA MAX11270 24-Bit, 10mW, 130dB SNR, 64ksps Delta-Sigma ADC with Integrated PGA www.maximintegrated.com Maxim Integrated │ 7 |
Similar Part No. - MAX11270 |
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Similar Description - MAX11270 |
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