NCP1090, NCP1091, NCP1092

http://onsemi.com

7

Description of Operation

Powered Device Interface

The integrated PD interface supports the IEEE 802.3af

defined operating modes: detection signature, current

source classification, undervoltage lockout, inrush and

operating current limits. The following sections give an

overview of these previous processes.

Detection

During the detection phase, the incremental equivalent

resistance seen by the PSE through the cable must be in the

IEEE 802.3af standard specification range (23.70 k

W to

26.30 k

W) for a PSE voltage from 2.7 V to 10.1 V. In order

to compensate for the non−linear effect of the diode bridge

and satisfy the specification at low PSE voltage, the

NCP1090/91/92 present a suitable impedance in parallel

with the 24.9 k

W Rdet external resistor. For some types of

diodes (especially Schottky diodes), it may be necessary to

adjust this external resistor.

The Rdet resistor has to be inserted between VPORTP and

DET pins. During the detection phase, the DET pin is pulled

to ground and goes in high impedance mode (open−drain)

once the device exit this mode, reducing thus the current

consumption on the cable.

Classification

Once the PSE device has detected the PD device, the

classification process begins. In classification, the PD

regulates a constant current source that is set by the external

resistor RCLASS value on the CLASS pin. Figure 4 shows

the schematic overview of the classification block. The

current source is defined as:

Iclass +

9.8 V

Rclass

Figure 4. Classification Block Diagram

CLASS

VPORTP

1.2 V

EN

Class_enable

VPORTP

VPORTN

9.8 V

Power Mode

When the classification hand−shake is completed, the

PSE and PD devices move into the operating mode.

Under Voltage Lock Out (UVLO)

The NCP1090/91/92 incorporate a fixed under voltage

lock out (ULVO) circuit which monitors the input voltage

and determines when to turn on the pass switch and charge

the dc−dc converter input capacitor before the power up of

the application.

The NCP1091 offers a fixed or adjustable Vuvlo_on

threshold depending if the UVLO pin is used or not. In

Figure 5, the UVLO pin is strapped to ground and the

Vuvlo_on threshold is defined by the internal level.

Figure 5. Default Internal UVLO Configuration

(NCP1091 only)

UVLO

VPORTP

VPORTN1,2

VPORT

To define the UVLO threshold externally, the ULVO pin

must be connected to the center of an external resistor

divider between VPORTP and VPORTN as shown in

Figure 6.

In order to guarantee the detection signature, the

equivalent input resistor made of the Ruvlo1, Ruvlo2 and

Rdet should be equal to 24.9 k

W.

UVLO

VPORTN1,2

VPORT

Ruvlo2

Ruvlo1

VPORTP

NCP1091

DET

Rdet

Figure 6. Default Internal UVLO Configuration

(NCP1091 only)

For a Vuvlo_on desired turn−on voltage threshold,

Ruvlo1 and Ruvlo2 can be calculated using the following

equations:

Ruvlo +

24.9 k @ Rdet

Rdet * 24.9 k

Ruvlo1 ) Ruvlo2 + Ruvlo

with

Ruvlo2 +

1.2

Vuvlo_on @

Ruvlo

and

With:

Vuvlo_on: Desired Turn−On voltage threshold