Electronic Components Datasheet Search |
|
SP8855E Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers |
|
SP8855E Datasheet(HTML) 3 Page - List of Unclassifed Manufacturers |
3 / 14 page SP8855E PIN Description PIN Description 1,2,3,4,5,6,7,8,9,10,11,42,43,44 These pins are the data inputs used to set the RF divider ratio (M.N+A). Open circuit = 1 (high) on these pins. Inputs are transparent into the data buffers. 13, 14 (RF INPUT) Balanced inputs to the RF pre-amplifier. For single ended operation the signal is AC coupled into pin 13 with pin 14 AC decoupled to ground (or vice -versa). Pins 13 and 14 are internally DC biased. 17 (LOCK DETECT INPUT) A current sink into this pin is enabled when the lock detect circuit indicates lock. Used to give an external indication of phase lock. 18 (C-LOCK DETECT) A capacitor connected to this point determines the lock detect integrator time constant and can be used to vary the sensitivity of the phase lock indicator. 19 (Rset) An external resistor from Pin 19 to V CC sets the charge pump output current 20 (CP OUTPUT) The phase detector output is a single ended charge pump sourcing or sinking current to the inverting input of an external loop filter. 21 (CP REF) Connected to the non-inverting input of the loop filter to set the optimum DC bias. 22 (F ref/Fpd ENABLE Part of the data input bus. When this pin is logic HI the F ref and Fpd outputs are enabled. Open circuit = HI 23 (CONTROL DIRECTION) This pin controls charge pump output direction. For Pin 23 HI the output sinks current when F pd > Fref or when the RF phase leads Ref phase. For Pin 23 LO the relationship is reversed. (see table 2). Changing the state of pin 23 reverses the pins on which Fref and Fpd output occur. See pin 24 and Pin 25 below for details. Open circuit = HI. 24 = F pd if Pin 23 is HI RF divider output pulses. Fpd = RF input frequency /(M.N+A). Pulse width = = F ref if Pin 23 is LO 8 RF input cycles (1 cycle of the divide by 8 prescaler output). 25 = F ref if Pin 23 is HI Reference divider output pulses. Fref = Reference input frequency/R. Pulse width = high period of Ref input. 27 (Reference Oscillator Capacitor) Leave open circuit if an external reference is used. See fig. 5 for typical connection for use as an onboard crystal oscillator. 28 (Ref IN/XTAL) This pin is the input buffer amplifier for an external reference signal. This amplifier provides the active element if an onboard crystal oscillator is used. 29,30,31,32,33,34,35,36,37,38 These pins set the Reference divider ratio R. Open circuit = HI. 39 (Phase Detector ENABLE) When this pin is HI the phase detector output is enable. Open circuit = HI. 40, 41 (PD Gain) These pins set the charge pump current multiplication factor (see table 1). Open circuit = HI. Data Sheet 291297 issue 3 Plessey Semiconductors Ltd. Design & Technology Centre, Delta 500, Delta Business Park, Great Western Way, Swindon, UK SN5 7XE Tel: +44 1793 518000 Fax: +44 1793 518030 Web: www.plesseysemi.com 3 |
Similar Part No. - SP8855E |
|
Similar Description - SP8855E |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |