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QP8085AH Datasheet(PDF) 1 Page - 3M Electronics |
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QP8085AH Datasheet(HTML) 1 Page - 3M Electronics |
1 / 21 page 8085AH/-1/-2 © 2013 Rochester Electronics, LLC. All Rights Reserved 04242013 Specification Number 8085AH-1-2-C (I) Rev C Page 1 of 21 TABLE 5 SPECIFICATION NUMBER 8085AH-1-2-C (I) REV - Page 1 of 20 The 8085AH is a complete 8-bit parallel Central Processing Unit (CPU) implemented in N-channel, depletion load, silicon gate technology (HMOS). Its instruction set is 100% software compatible with the 8080A microprocessor, and it is designed to improve the present 8080A’s performance by higher system speed. Its high level of system integration allows a minimum system of three IC’s [8085AH (CPU), 8156H (RAM/IO) and 8755A (EPROM/IO)] while maintaining total system expandability. The 8085AH-2 and 8085AH-1 are faster versions of the 8085AH. The 8085AH incorporates all of the features that the 8224 (clock generator) and 8228 (system controller) provided for the 8080A, thereby offering a higher level of system integration. The 8085AH uses a multiplexed data bus. The address is split between the 8-bit address bus and the 8-bit data bus. The on-chip address latches of 8155H/8156H/8755A memory products allow a direct interface with the 8085AH. Rochester Electronics guarantees performance of its semiconductor products to the original OEM specifications. “Typical” values are for reference purposes only. Certain minimum or maximum ratings may be based on product characterization, design, simulation, or sample testing. Rochester Electronics reserves the right to make changes without further notice to any specification herein. For complete Rochester ordering guide, please refer to page 2 Please contact factory for specific package availability and Military/Aerospace specifications/availability. |
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