Table 1-1 List of ML67Q4050/ML67Q4060 Series Pin Functions (2 of 6)

Primary function

Secondary function

Tertiary function

Setting at reset

Pin assignment

Pin name

I/O

Description

Signal

name

I/O Description

Signal

name

I/O

Description

Signal

name

I/O

Description

IPU

Schmitt

trigger

circuit

Sink

current

[mA]

144

QFP

144

BGA

64

QFP

84

BGA

64

WCSP

PA0

I/O

General-purpo

se port A0

TCK

I

JTAG clock





3

20

A7

9

F3

D3

PA1

I/O

General-purpo

se port A1

TMS

I

JTAG mode

setting



—

3

21

C6

10

F1

D4

PA2

I/O

General-purpo

se port A2

TDI

I

JTAG data

input



—

3

22

D6

11

G2

C5

PA3

I/O

General-purpo

se port A3

TDO

O

JTAG data

output

—

—

3

23

B6

12

G3

C3

PA4

I/O

General-purpo

se port A4

NTRS

T

I

JTAG reset





3

26

D5

14

H2

A2

PA5

I/O

General-purpo

se port A5

JTAGE

I

JTAG Enable —

—

3

30

C4

15

H1

A1

RSTOUT_N

O

Reset output

PA6

I/O

General-purp

ose port A6

MCLK

O

AUDIO_CLK

output

—

—

3

51

F4

22

K4

A4

PB0

I/O

General-purpo

se port B0

TX0

O

UART0 TX

—

—

3

96

M9

46

D9

F8

PB1

I/O

General-purpo

se port B1

RX0

I

UART0 RX

—

—

3

95

M8

45 E10

E5

PB2

I/O

General-purpo

se port B2

TX1

O

UART1 TX EFIQ_N

I

External interrupt

FIQ*Note

—

—

3

94

K8

44

E8

E6

PB3

I/O

General-purpo

se port B3

RX1

I

UART1 RX EXINT1

I

External interrupt

1 *Note

—

—

3

112 L13

49

A9

H8

PB4

I/O

General-purpo

se port B4

SCL

I/O

I2C SCL

TXD

O

SIO TX

—



3

116 J11

50

B8

G8

PB5

I/O

General-purpo

se port B5

SDA

I/O

I2C SDA

RXD

I

SIO RX

—



3

121 H13 51

C8

F7

PC0

I/O

General-purpo

se port C0

MISO0 I/O SPI0 MISO

DSR0

I

UART0 DSR

—

—

3

66

K3

31

J8

A7

PC1

I/O

General-purpo

se port C1

MOSI0 I/O SPI0 MOSI

DTR0

O

UART0 DTR

—

—

3

60

J2

29

H7

D5

PC2

I/O

General-purpo

se port C2

SCK0 I/O

SPI0 SCK

RI0

I

UART0 RI

—



3

59

H2

28

J7

A6

PC3

I/O

General-purpo

se port C3

SSN0 I/O

SPI0 SSN

DCD0

I

UART0 DCD

—



3

58

H4

27

K6

B6

PC4

I/O

General-purpo

se port C4

MISO1 I/O SPI1 MISO

DSR1

I

UART1 DSR

—

—

3

57

H3

26

H6

C6

PC5

I/O

General-purpo

se port C5

MOSI1 I/O SPI1 MOSI

DTR1

O

UART1 DTR

—

—

3

56

G1

25

J6

A5

PC6

I/O

General-purpo

se port C6

SCK1 I/O

SPI1 SCK

RI1

I

UART1 RI

—



3

50

F2

21

H4

B4

PC7

I/O

General-purpo

se port C7

SSN1 I/O

SPI1 SSN

DCD1

I

UART1 DCD

—



3

49

F1

20

J4

C4

*Note: External interrupt FIQ and external interrupt 1 can be used as interrupt signals in the primary and secondary functions.