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ML610Q482 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
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ML610Q482 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers |
2 / 32 page FEDL610Q482-02 ML610Q482/ML610482 2/32 • PWM − Resolution 16 bits × 1 channel • Synchronous serial port − Master/slave selectable − LSB first/MSB first selectable − 8-bit length/16-bit length selectable • UART − TXD/RXD × 1 channel − Bit length, parity/no parity, odd parity/even parity, 1 stop bit/2 stop bits − Positive logic/negative logic selectable − Built-in baud rate generator • I2C bus interface − Master function only − Fast mode (400 kbps@4MHz), standard mode (100 kbps@1MHz, 50kbps@500kHz) • Buzzer driver − 4 output modes, 8 frequencies, 16 duty levels • RC oscillation type A/D converter − 24-bit counter − Time division × 2 channels • Analog Comparator − Operating voltage: VDD=1.8V~3.6V − Common mode input voltage: 0.2V~VDD-1.0V − Input offset voltage: 50mV(max) − Interrupt allow edge selection and sampling selection • General-purpose ports − Non-maskable interrupt input port × 1 channel − Input-only port × 6 channels (including secondary functions) − Output-only port × 4 channels (including secondary functions) − Input/output port × 22 channels (including secondary functions) • Reset − Reset through the RESET_N pin − Power-on reset generation when powered on − Reset when oscillation stop of the low-speed clock is detected − Reset by the watchdog timer (WDT) overflow • Power supply voltage detect function − Judgment voltages: One of 16 levels − Judgment accuracy: ±2% (Typ.) • Clock − Low-speed clock: (This LSI can not guarantee the operation without low-speed clock) Crystal oscillation (32.768 kHz/38.4KHz) − High-speed clock: Built-in RC oscillation (500 kHz) Built-in PLL oscillation (8.192 MHz ±2.5%), crystal/ceramic oscillation (4.096 MHz), external clock − Selection of high-speed clock mode by software: Built-in RC oscillation, built-in PLL oscillation, crystal/ceramic oscillation, external clock |
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