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ICE2B265 Datasheet(PDF) 11 Page - Infineon Technologies AG |
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ICE2B265 Datasheet(HTML) 11 Page - Infineon Technologies AG |
11 / 36 page Version 2.6 11 25 Dec 2006 CoolSET™-F2 Functional Description secondary output voltage is insensitive on line variations. Line variation changes the current waveform slope which controls the duty cycle. The external RSense allows an individual adjustment of the maximum source current of the integrated CoolMOS™. Figure 9 Improved Current Mode To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and the 1st order low pass filter composed of R1 and C1(see Figure 9, Figure 10). Every time the oscillator shuts down for max. duty cycle limitation the switch T2 is closed by VOSC. When the oscillator triggers the Gate Driver T2 is opened so that the voltage ramp can start. In case of light load the amplified current ramp is to small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp. By means of the Comparator C5, the Gate Driver is switched-off until the voltage ramp exceeds 0.3V. It allows the duty cycle to be reduced continuously till 0% by decreasing VFB below that threshold. Figure 10 Light Load Conditions 3.2.1 PWM-OP The input of the PWM-OP is applied over the internal leading edge blanking to the external sense resistor RSense connected to pin Isense. RSense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.65 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current signal is fed into the positive inputs of the PWM- Comparator, C5 and the Soft-Start-Comparator. 3.2.2 PWM-Comparator The PWM-Comparator compares the sensed current signal of the integrated CoolMOSTM with the feedback signal VFB (see Figure 11). VFB is created by an external optocoupler or external transistor in combination with the internal pull-up resistor RFB and provides the load information of the feedback circuitry. When the amplified current signal of the integrated CoolMOS™ exceeds the signal VFB the PWM- Comparator switches off the Gate Driver. x3.65 PWM OP 0.8V 10k Ω Oscillator PWM Comparator 20pF T 2 R 1 C 1 FB PWM-Latch V 1 C5 0.3V Gate Driver Voltage Ramp V OSC Soft-Start Comparator t t V OSC 0.8V FB t max. Duty Cycle 0.3V Gate Driver Voltage Ramp |
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Similar Description - ICE2B265 |
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