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NCV3020B Datasheet(PDF) 10 Page - ON Semiconductor |
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NCV3020B Datasheet(HTML) 10 Page - ON Semiconductor |
10 / 23 page NCP3020A, NCP3020B, NCV3020A, NCV3020B http://onsemi.com 10 OOV and OUV The output voltage of the buck converter is monitored at the feedback pin of the output power stage. Two comparators are placed on the feedback node of the OTA to monitor the operating window of the feedback voltage as shown in Figures 22 and 23. All comparator outputs are ignored during the soft−start sequence as soft−start is regulated by the OTA and false trips would be generated. After the soft−start period has ended, if the feedback is below the reference voltage of comparator 2 (VFB < 0.45 V), the output is considered “undervoltage” and the device will initiate a restart. When the feedback pin voltage rises between the reference voltages of comparator 1 and comparator 2 (0.45 < VFB < 0.75), then the output voltage is considered “Power Good.” Finally, if the feedback voltage is greater than comparator 1 (VFB > 0.75 V), the output voltage is considered “overvoltage,” and the device will latch off. To clear a latch fault, input voltage must be recycled. Graphical representation of the OOV and OUV is shown in Figures 24 and 25. Vref = 0.6 V Vref*75% Vref*125% Comparator 1 Comparator 2 LOGIC Soft Start Complete Restart Latch off FB Figure 22. OOV and OUV Circuit Diagram Power Good = 1 Power Good = 1 Vref = 0.6 V Voov = Vref * 125% OUVP & Power Good = 0 OOVP & Power Good = 0 Hysteresis = 5 mV Hysteresis = 5 mV Power Not good High Power Not Good Low Figure 23. OOV and OUV Window Diagram Vouv = Vref * 75% |
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