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HN58S256A Datasheet(PDF) 5 Page - Hitachi Semiconductor |
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HN58S256A Datasheet(HTML) 5 Page - Hitachi Semiconductor |
5 / 17 page HN58S256A Series Capacitance (Ta = 25 °C, f = 1 MHz) Parameter Symbol Min Typ Max Unit Test conditions Input capacitance* 1 Cin — — 6 pF Vin = 0 V Output capacitance* 1 Cout — — 12 pF Vout = 0 V Note: 1. This parameter is periodically sampled and not 100% tested. AC Characteristics (Ta = 0 to +70 °C, V CC = 2.2 to 3.6 V) Test Conditions • Input pulse levels: 0.4 V to 1.9 V (V CC ≤ 2.7V), 0.4V to 2.4 V (VCC > 2.7 V) • Input rise and fall time: ≤ 5 ns • Input timing reference levels: 0.8, 1.8 V • Output load: 1TTL Gate +100 pF • Output reference levels: 1.1 V, 1.1 V (V CC ≤ 2.7V),1.5 V, 1.5 V (VCC > 2.7 V) Read Cycle HN58S256A -15 -20 Parameter Symbol Min Max Min Max Unit Test conditions Address to output delay t ACC — 150 — 200 ns CE = OE = V IL, WE = VIH CE to output delay t CE — 150 — 200 ns OE = V IL, WE = VIH OE to output delay t OE 10 80 10 100 ns CE = V IL, WE = VIH Address to output hold t OH 0— 0 — ns CE = OE = V IL, WE = VIH OE (CE) high to output float* 1 t DF 0 100 0 100 ns CE = V IL, WE = VIH |
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