HN58X24128I/HN58X24256I

7

Pin Function

Serial Clock (SCL)

The SCL pin is used to control serial input/output data timing. The SCL input is used to positive edge

clock data into EEPROM device and negative edge clock data out of each device. Maximum clock rate is

400 kHz.

Serial Input/Output Data (SDA)

The SDA pin is bidirectional for serial data transfer. The SDA pin needs to be pulled up by resistor as that

pin is open-drain driven structure. Use proper resistor value for your system by considering V

the SDA pin capacitance. Except for a start condition and a stop condition which will be discussed later,

the SDA transition needs to be completed during SCL low period.

Data Validity (SDA data change timing waveform)

SCL

SDA

Data

change

Data

change

Note:

High-to-low and low-to-high change of SDA should be done during SCL low periods.